02-06-2015 09:01 AM
When using the VC709 board, I struggled with this issue for a bit and all I found on the forums was variants on the "use FREE_RUN" answer which at best is incomplete, so I thought I'd add a more detailed 'how to'.
First, you will need to go to the Silicon Labs website and download their DSPLLsim desktop application. This will calculate and generate the exact device register settings you need to load to get the device to output a clock signal of a particular frequency. The way the Si5324 device works is that in free run mode the crystal generated frequency is piped directly to channel 2 of the clock and that will be your reference on channell 2. Channel one, on the VC709 is connected to the V7 devices on the board. If no signal is present on channel 1's pins, the Si5324 automatically switches to channel 2 to look for a reference clock there. To have the Si5324 act as a clock generator, we make use of that known behavior by not driving any signal to channel 1 from the FPGA and forcing it to use the channel two's crystal as the reference frequency.
With all that as background, start DSPLLsim. When the tool starts select the "Create a new frequency plan with free run mode enable". Free run mode is the mode that connects the crystral directly to channel 2. (So, yes, you do need to use free run mode but...) On the next page select the Si5324 device and then on the following (configuration) page you enter the target frequency (CKOUT1) as well as the channel 1 input frequency (CKIN1). The trick here is that we know the channel 1 input frequency is zero but we need to enter something to satsify the tool (so it can in turn satisfy the device that needs all of its registers initialized with legal values). So enter the crystal frequency (114.285) since that is what will be driven on channel 2 anyway (and as we said before if no frequency is detected on channel 1 it switches to channel 2) and we need to establish the corect ratio values. After you have entered the CKIN and CKOUT then press the "Calculate Ratio" button under CKOUT1. This will calculate an appropriate ratio based on your CKIN and CKOUT. Before you leave this page set the number of output clocks to 1 (since only one output is used on the device on the vc709, anyway). Then hit 'Next'. Leave the search parameters at default and hit next. This will calculate solutions for the device parameters. If none are found go back to the search parameter page and lower the frequency a bit. Keep iterating until a solution is found. When it is found, choose the top solution (it is usually the most accurate and the default one selected anyway) and hit 'Next'. As you continue to hit next, the calculated value for each of the device parameters will be displayed (which is, I suppose, interesting to see but otherwise rather useless for our purposes). You will soon get to a 'Results' page at which time you are asked if you want to use these settings. The answer is, of course, 'OK'. That brings you to the tool's main display in which you can futz around with the values and examine them. We don't want to do that. we want to 'export' them So look on the application pulldown in the upper left and choose Options->Save Register Map File... This will generate a text file that contains ALL the register settings that you need to get the device generating your target clock.
Open the register file and the data you need is between #REGISTER_MAP and #END_REGISTER_MAP as pairs in which the first element in the pair is the register number and the second is the register contents to be programmed. Use these values in your code to load the device registers in the exact order specified using the IIC connection. Then you are ready to go. For the device to load and act on these, you need to restart the device and get it to recalibrate itself. The last register setting in the seqeunce performs that operation.
After the load is complete, you should see the Si5324 CKOUT1 generating a clock at the frequency you indicated.
02-26-2015 05:00 AM
03-10-2015 11:16 PM
Thanks but that reference shows you how to use the Si5324 to reduce jitter but does not show how to program the Si5324 to act as a clock generator and that is precisely why I posted this message.
12-19-2016 12:34 AM
04-25-2019 02:17 AM