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Observer aldopowell
Observer
94 Views
Registered: ‎08-28-2014

Pins not connected critical warning

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I have created a block design involving a Zynq 7010 on a Cora Z7 eval board.  My custom block contains signals that need to be routed to the Pmod connectors on the board.  When I validate that design I get the following warning

[BD 41-759] The input pins (listed below) are either not connected or do not have a source port,  and they don't have a tie-off specified. These pins are tied-off to all 0's to avoid error in Implementation flow.
Please check your design and connect them as needed:
/mk5_sampler_0/JA2
/mk5_sampler_0/JB2
/mk5_sampler_0/JA3
/mk5_sampler_0/JB3

How can I make Vivado recognize that these signals are legitimate and are not to be tied off?

 

 

 

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1 Solution

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Observer aldopowell
Observer
40 Views
Registered: ‎08-28-2014

Re: Pins not connected critical warning

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I have resolved the current issue.  I failed to create the ports at the top level of the block diagram.  Now that I have included these ports at this level I do not get this warning.  Thanks.

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4 Replies
Moderator
Moderator
81 Views
Registered: ‎05-31-2017

Re: Pins not connected critical warning

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Hi @aldopowell,

Please check the below AR and see if it helps

https://www.xilinx.com/support/answers/63035.html

 

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Explorer
Explorer
60 Views
Registered: ‎03-28-2016

Re: Pins not connected critical warning

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If those signals need to be connected to the Pmod pins on the board, then you are getting a valid critical warning.  To fix the critical warning, all you need to do is route the signals to the top-level of your design so that they can be connected to the proper pins in your XDF file.

 

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
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Observer aldopowell
Observer
44 Views
Registered: ‎08-28-2014

Re: Pins not connected critical warning

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The signals are at the top level of the AXI IP block that I created.  Are you referring to a wrapper that contains this block plus the Zynq7, AXI interconnect and processor system reset blocks?

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Observer aldopowell
Observer
41 Views
Registered: ‎08-28-2014

Re: Pins not connected critical warning

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I have resolved the current issue.  I failed to create the ports at the top level of the block diagram.  Now that I have included these ports at this level I do not get this warning.  Thanks.

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