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Visitor imode69
Visitor
3,636 Views
Registered: ‎08-24-2011

SP601 - help interfacing a PS/2 keyboard

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I wish to experiment with a  keyboard and mouse by attaching a  PS/2 interface to the GPIO header on my SP601. Since the PS/2 interface is LVTTL would the built-in GPIO 200 ohm series resistors be enough?   Also, since the keyboard I'm planning to attach is open collector I would assume I need to pullup these pins? So from my understanding is it sufficient to do this?

 

UCF constraints for SP601 board:

 

NET "PS2_DATA1" LOC="N17" | IOSTANDARD = LVCMOS33 | PULLUP; ## GPIO_HDR0 

NET "PS2_CLK1"  LOC="M18" | IOSTANDARD = LVCMOS33 | PULLUP; ## GPIO_HDR1

NET "PS2_DATA2" LOC="A3"  | IOSTANDARD = LVCMOS33 | PULLUP; ## GPIO_HDR2 

NET "PS2_CLK2"  LOC="L15" | IOSTANDARD = LVCMOS33 | PULLUP; ## GPIO_HDR3

 

I'm a hobbyist new to hardware design and prefer not to fry my new board.

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Instructor
Instructor
4,511 Views
Registered: ‎08-14-2007

Re: SP601 - help interfacing a PS/2 keyboard

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Is the keyboard LVTTL or is it TTL (i.e. 5V TTL)?

 

Are all of the signals open collector (or open-drain)?

 

Here's my guesses:

 

1) If everything is open-collector, then you don't need voltage limiting circuitry, just make

sure to pull the signals up to 3.3V rather than 5V.

 

2) Internal pull-up resistors in the Spartan 6 only guarantee 200 uA at Vcco = 3.3V.  While this

is likely to be enough to overcome the off-state leakage current of the keyboard, you would

still have issues with the rise time due to the capacitances of each net.  For example,

if the output capacitance of the keyboard is 15 pF and the input capacitance of the S6

chip is 15 pF, you would have 30 pF charging at 200 uA max or about 150 ns per volt.

You need to ask yourself if you can live with this much rise time (half to a microsecond).

Even with a 1K pull-up to 3.3V, you would not be able to use the clock signal directly

as a clock because of the rise time and lack of hysteresis on the FPGA inputs.

 

3) If any of the keyboard outputs are active drive (not open collector), then a resistor is

not enough protection if the signal swing is 5V.  Spartan 6 does not have clamp diodes

to Vcco.

 

4) All of this would be taken care of using an external chip like a 74HC14 running on

the 3.3V supply of the SP601 board.

 

-- Gabor

-- Gabor
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2 Replies
Instructor
Instructor
4,512 Views
Registered: ‎08-14-2007

Re: SP601 - help interfacing a PS/2 keyboard

Jump to solution

Is the keyboard LVTTL or is it TTL (i.e. 5V TTL)?

 

Are all of the signals open collector (or open-drain)?

 

Here's my guesses:

 

1) If everything is open-collector, then you don't need voltage limiting circuitry, just make

sure to pull the signals up to 3.3V rather than 5V.

 

2) Internal pull-up resistors in the Spartan 6 only guarantee 200 uA at Vcco = 3.3V.  While this

is likely to be enough to overcome the off-state leakage current of the keyboard, you would

still have issues with the rise time due to the capacitances of each net.  For example,

if the output capacitance of the keyboard is 15 pF and the input capacitance of the S6

chip is 15 pF, you would have 30 pF charging at 200 uA max or about 150 ns per volt.

You need to ask yourself if you can live with this much rise time (half to a microsecond).

Even with a 1K pull-up to 3.3V, you would not be able to use the clock signal directly

as a clock because of the rise time and lack of hysteresis on the FPGA inputs.

 

3) If any of the keyboard outputs are active drive (not open collector), then a resistor is

not enough protection if the signal swing is 5V.  Spartan 6 does not have clamp diodes

to Vcco.

 

4) All of this would be taken care of using an external chip like a 74HC14 running on

the 3.3V supply of the SP601 board.

 

-- Gabor

-- Gabor
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Visitor imode69
Visitor
3,604 Views
Registered: ‎08-24-2011

Re: SP601 - help interfacing a PS/2 keyboard

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Thank you for the advice. The keyboard in question is quite old so I'm going to assume 5V TTL thus buffering with the Schmitt trigger is the best choice. 

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