10-06-2010 10:01 AM
I made a costly mistake while working on SP605.
I was monitoring GPIO LED (D56) on SP605 using oscilloscope probe for debugging my design.
Accidentally the probe touched C131 capacitor ( when I was still probing LED) just above these LEDs... and thuddd...
There was a spark on FPGA package and device has literally cracked :(
C131 is btw 12V and GND...
VCCAUX and VCC25 decaps are showing short with GND.
Not all (other) decaps are showing short with GND
What can be extent of damage ?
I am in a dileama:
1. Replace FPGA ? (Assuming only FPGA have gone bad) : ~90 $ FPGA + rework charges
take a chance with this cheaper solution ?
2. Buy new board $495
10-06-2010 10:18 AM
Did you remove the FPGA before this probing? You probably popped some caps as well and they will need to be replaced. I've seen boards survive worse.
10-06-2010 10:22 AM
This is very bad, as you have already found out.
12v into any pin on the FPGA is likely to have blown it completely (massive oxide and junction breakdowns, evaporation of metal lines).
What else is connected to the same node you shorted? If any other chips on the board also connected to this node, they are likely destroyed, as well.
There is a chance that if nothing else is connected to the 12v node by accident, only the FPGA is bad. But, if you rework, replace, the FPGA, and it is still bad, you will be very unhappy.
If you decide to rework the FPGA, I would remove the FPGA first, and not buy a new one. Test the power supplies. Make sure all pins to/from the FPGA are at appropriate voltages. Make sure no other chips have broken down or crowbar.
Then, and only then, would I place a new part on the board. Depending on how thorough you were in checking out the board before placing a new part on it, it then may work (no guarantees!).
I have destroyed boards, too, in my long career. I am not proud of my mistakes, and I was sure to learn never to do it again (in the same fashion, at least). Accidents do happen.
Often, the most painful part, is realizing it is probably less expensive, and less aggravating to just start over with a new board.
10-06-2010 10:53 AM
Thanks for the suggestions.
There was nothing explicitly connected to 12V rail.
I am also thinking on similar plan of action and not to buy new FPGA straight-away.
Should I go decaps first or FPGA first -- as FPGA looks to be a most likely culprit.
Another concern I have is, if it turns out "only" FPGA has gone bad and I get it replaced, how much reliable board will be after this rework.
(Fortunately) I have not required to rework BGA-like FPGA.. I believe there will be many decap removal from bottom-side of the board and some components nearby.
Even-if those get re-soldered later and the rework person does descent job, in general what will be the reliability of the board after this ?
10-06-2010 11:04 AM
FPGA is not removed yet.
Also not any caps. Planning to remove some biggies first and check those outside board for open or short -- This might give some idea about other caps.
and then remove FPGA.
10-06-2010 11:18 AM
I really can't comment on the details of how to track this down or get it fixed: I am afraid that any assumptions I make will turn on wrong.
For example, is it the chip, or the caps, or both? I would assume the chip first, caps second, but I can easily be wrong!
If you have a lot of time, and you are not spending any money (you pay yourself nothing), then you can take it one component at a time .... but it will be a long slow road to recovery.
As for damaging the board: yes, that is a real possibility unless you follow very careful and strict rework processes with the best equipment. This is impossible with simple bench-top equipments for re-work (in my opinion). Even with the best equipment the pcb may end up damaged (lifted pads, traces, broken feed thru holes, etc.).
10-06-2010 11:32 AM
Yes its tricky !
Lets see how the rework goes then will take a call btw time, lesser money, patience and more money (new board !)
Just wondering, how I landed-up here ? -- There is no GPIO on a simple header on SP605 to probe. All I/Os are alloted to peripherals and FMC,-LPC.
In many cases its very useful to tap some internal signal on take out of FPGA and probe... (which I was doing) but I chose wrong / dangerous probe point LED whose anode was very near to 12v decap pad.
Though ChipScope is there to address this issue to a certain extent, a suggestion / request : Can Xilinx keep a few I/Os vacant on simple headers.
[By no means I want to put blame on board architecture. I should have probed carefully ! ]
10-06-2010 12:47 PM
Hindsight is 20-20, but you could have used J3. It is unpopulated, but the holes make easily probe points.
10-06-2010 10:17 PM
Reworking charge is quite expensive for BGA. Here in Singapore usually the vendor will charge 100 US Dollar for 1 BGA in rework station. They will not guarantee whether it is fully bonded to the pads or not, it is only based on their experience only. I am not sure whether XRay can be done for this since usually it is used on the SMT process not on the rework station, anyway it will involve additional cost.
I think you will encounter future doubt/difficulty during your development if you rework the board. Did you trust your rework vendor? or maybe other part of the components also damaged? time for you to troubleshoot and test?
I will choose to buy a new one..
10-06-2010 11:12 PM
Yes theoretically J3 is there. But its toooo cramped to probe .
The risk of touching neighboring component is equally there.
I strongly feel "development board" should have descent number I/Os to probe with ease.
10-07-2010 10:27 AM
If you decide to order a new SP605, you may consider to order a XM105 Debug-FMC as well: FMC XM105 Debug Card
It's another $159, but you get lots of easy accessible I/Os, a Mictor connector for logic analyzer probes and even some additional LEDs.