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Visitor Rengainria
Visitor
9,547 Views
Registered: ‎04-15-2015

Trouble programming VC707

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When i try to program my VC707 board, i'm getting the following error message.

 

set_property PROBES.FILE {C:/Xilinx/Vivado/expt/IIC1/IIC1.runs/impl_1/debug_nets.ltx} [lindex [get_hw_devices] 0]
set_property PROGRAM.FILE {C:/Xilinx/Vivado/expt/IIC1/IIC1.runs/impl_1/IIC_controller.bit} [lindex [get_hw_devices] 0]
program_hw_devices [lindex [get_hw_devices] 0]
WARNING: [Labtools 27-33] Done pin status: LOW
program_hw_devices: Time (s): cpu = 00:00:20 ; elapsed = 00:00:19 . Memory (MB): peak = 1821.008 ; gain = 164.625
refresh_hw_device [lindex [get_hw_devices] 0]
ERROR: [Labtools 27-2312] Device xc7vx485t_0 is no longer available. Check cable connectivity and that the target board is powered up then use the disconnect_hw_server and connect_hw_server to re-initialize the hardware target. Use  open_hw_target to re-register the hardware device.

 

Though i'm not getting any errors during synthesis, implementation and generate bitstream phases. When i try to program the same board using someother bitstream it works without any problem. Can someone tell me what could be the issue.

 

Thank you

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1 Solution

Accepted Solutions
Visitor Rengainria
Visitor
17,333 Views
Registered: ‎04-15-2015

Re: Trouble programming VC707

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Hi @pratham,

 

In the september 2014 version of VC707 userguide, under I2C Bus sub section, slave address for USER_CLK_SDL/SCL  is 0b1110000,  in the april 2015 version of the userguide, slave address for USER_CLK_SDL/SCL(Si570 Clock) is 0b1011101.

 

Address given is the 2014 version of userguide is not working, while april 2015 gives the correct slave address.

 

Thank you

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6 Replies
Scholar pratham
Scholar
9,482 Views
Registered: ‎06-05-2013

Re: Trouble programming VC707

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Hi @Rengainria,

 

Do you have impact installed on your machine? can you try with it?

 

I dont think so it is related to design .bit file. Are you able to run the bist design?

 

It seems board is lossing the connection with hardware manager.

-Pratham

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Visitor Rengainria
Visitor
9,404 Views
Registered: ‎04-15-2015

Re: Trouble programming VC707

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Hi @pratham

 

Thank you for your reply, I'm new to xilinx, i used to work with Altera for long time.  I suppose IMPACT is a programming tool, i have installed vivado design suite, so i guess IMPACT should be part of it, but i couldn't find it yet may be i have to download and install.

 

I have tried to run BIST, and checked IIC, it passes the test.  The problem i'm facing is when i configure the IIC switch to choose one of the down stream slave (USER CLK) and when i address the slave to read or write, i'm not getting any response, when i use IIC at 400kbps speed i was not getting ack from the slave, when i reduced the speed to 100kbps i'm getting ack but not able to read of write..  Also getting error device is not programmed and done pin is low.  I have attached my IIC controller vhdl code incase if you need to have a look.

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Scholar austin
Scholar
9,394 Views
Registered: ‎02-27-2008

Re: Trouble programming VC707

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Vivado has replaced Impact with Hardware Manager,

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Visitor Rengainria
Visitor
9,345 Views
Registered: ‎04-15-2015

Re: Trouble programming VC707

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Hi,

I have fixed this bug, the problem was i was referring slave address in september 2014 manual, which is not working, when i looked at april 2015 manual it is working without any problem.

 

Thank you 

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Scholar pratham
Scholar
9,341 Views
Registered: ‎06-05-2013

Re: Trouble programming VC707

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Hi @Rengainria

 

Ok, glad to know that issue seems to be resolved.

Can you please point us to the BUG which was there in the documentation?

As your issue got resolved please close this thread by marking it as solution

-Pratham

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
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Visitor Rengainria
Visitor
17,334 Views
Registered: ‎04-15-2015

Re: Trouble programming VC707

Jump to solution

Hi @pratham,

 

In the september 2014 version of VC707 userguide, under I2C Bus sub section, slave address for USER_CLK_SDL/SCL  is 0b1110000,  in the april 2015 version of the userguide, slave address for USER_CLK_SDL/SCL(Si570 Clock) is 0b1011101.

 

Address given is the 2014 version of userguide is not working, while april 2015 gives the correct slave address.

 

Thank you

0 Kudos