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Visitor hodler
Registered: ‎03-04-2013

ZC702 Evaluation board MIO/EMIO mapping



We are developing FMC extension board that sits and works with ZC702 Evaluation board. Planned to use FMC connector J3. Our extension board should have 1x SPI interface, 2x CAN interface & 1x GMII Ethernet interface.


As per the ZC702 eval board user guide(UG850), we know that the FMC connector J3 in zync board uses PL IO's (LAXX*). But we would like to bring out PS IO's (MIO) with SPI, Ethernet & CAN soft IP's shared through PL IO's. Is this possible?


Also we understand from Zync SoC TRM manual(UG585), the MIO pins can be routed to PL IO's through EMIO pins. If so can i route SPI, Ethernet and CAN signals available in PS_MIO signals to PL IO's (LAXX*)? If yes, kindly let me know, which PL (LAXX*) pins can be mapped to SPI, Ethernet and CAN signals.


Appeciate your early reply....


Thanks & Regards

Sivakumar NM

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Xilinx Employee
Xilinx Employee
Registered: ‎08-01-2012

Re: ZC702 Evaluation board MIO/EMIO mapping

You can find part of related information in the below forum post discussion. 





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