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Visitor oldwindways
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Registered: ‎11-25-2015

ZC702 stuck trying to Program FPGA

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I am trying to load an existing bitstream into the ZC702 via the Xilinx Platform Cable USB II (model DLC10) from the Xilinx SDK (part of ISE Design Suite 14.3, running on Windows 7).

 

The process starts and the Progress information window shows the progress bar at about 1/3 complete, but it just hangs there indefinitely (screen shot attached).  This actually locks up the SDK such that it can only be closed by ending the task in the Windows Task Manager.  There is no output visible in the console log.

 

I have also attached a photo of the board's configuration.  The FMC module attached to FMC1 is an AVNET AES-FMC-ISMNET-G and is currently connected in a loop back configuration.

 

Any ideas on what may be causing the FPGA programming process to fail, and what I can try to trouble shoot it?

 

My colleagues overseas have the same hardware setup with the same bitstream and have not encountered this problem.  We have been unable to identify any difference in our procedure that could explain the failure.

 

Thanks,

 

Aaron

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Programming FPGA screenshot.png
Board Configuration 25Nov2015.JPG
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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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It apears that the issue was due to the path of the bitstream containing spaces.  

D:/AFDX IP Kit Zynq 7020/IP v1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit

 

By removing the spaces and trying again I was able to get it to program sucessfully.

D:/AFDX_IP_Kit_Zynq_7020/IPv1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit

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Xilinx Employee
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Registered: ‎07-23-2012

Re: ZC702 stuck trying to Program FPGA

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Are you unable to program PL at all using SDK?

Can you please try impact to program PL and see if it successful? This will tell us if it is a board/design related issue or not.
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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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smarel, thanks for responding so quickly.

 

When I ran "Initialize Chain" in impact yesterday, I got the attached results.

 

I tried to assign demo_top.bit to the first block (the zynq7000_arm_dap) by double clicking on it and selecting the file.  I don't recall what exactly the error message or behavior was, but I don't think it worked (I am out of the office until Monday so I can not run additional tests before then).

Is this the proper method for trying to program the FPGA with Impact?  If not, could you send me a procedure for how to do this?  This is my first time working with the ISE Design Suite, so don't assume I know what I am doing :)

 

I can attempt to test this again on Monday and share my results.

Impact Scan 26Nov2015.png
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Xilinx Employee
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Registered: ‎08-02-2007

Re: ZC702 stuck trying to Program FPGA

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hi,

 

another way of ruling out if this is a board specific problem or a problem with the design, i would recommend to use the BIST reference system which has the tested applications running on zc702.

 

you can refer to this document http://www.xilinx.com/support/documentation/boards_and_kits/zc702_BIST_pdf_xtp180_14.1.pdf and run one of the applications to confirm if the board is functional. If the test applications are working as expected given in the documentation, the next step would be to debug from the bitstream perspective.

 

you can select the BIST reference design at this link http://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html#documentation

 

--hs

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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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I went back and attempted to program the FPGA via impact and failed.  Attached is a screenshot of the results.  I am also including the console output here:

 

Welcome to iMPACT
iMPACT Version: 14.3
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
// *** BATCH CMD : setMode -bs
GUI --- Auto connect to cable...
// *** BATCH CMD : setCable -port auto
INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.3
INFO:iMPACT - Digilent Plugin: no JTAG device was found.
AutoDetecting cable. Please wait.
*** WARNING ***: When port is set to auto detect mode, cable speed is set to default 6 MHz regardless of explicit arguments supplied for setting the baud rates
PROGRESS_START - Starting Operation.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
 Driver file xusb_xp2.sys found.
 Driver version: src=2301, dest=2301.
 Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
 Cable PID = 0008.
 Max current requested during enumeration is 300 mA.
Type = 0x0005.
write (count, cmdBuffer, dataBuffer) failed C0000004.
 Cable Type = 3, Revision = 0.
 Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 2301.
File version of D:/Xilinx/14.3/ISE_DS/ISE/data/xusb_xp2.hex = 2401.
Firmware hex file version = 2401.
Downloading D:/Xilinx/14.3/ISE_DS/ISE/data/xusb_xp2.hex.
Downloaded firmware version = 2401.
PLD file version = 200Dh.
 PLD version = 200Dh.
PROGRESS_END - End Operation.
Elapsed time =      1 sec.
Type = 0x0005.
ESN option: 00001865B62901.
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: 11/30/2015 19:33:16
// *** BATCH CMD : Identify -inferir 
PROGRESS_START - Starting Operation.
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xc7z020, Version : 2
INFO:iMPACT:1777 - 
Reading D:/Xilinx/14.3/ISE_DS/ISE/zynq/data/xc7z020.bsd...
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:501 - '1': Added Device xc7z020 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
'1': : Manufacturer's ID = Xilinx zynq7000_arm_dap, Version : 4
INFO:iMPACT:501 - '1': Added Device UNKNOWN successfully.
----------------------------------------------------------------------
INFO:iMPACT:1777 - 
Reading D:/Xilinx/14.3/ISE_DS/ISE/zynq/data/zynq7000_arm_dap.bsd...
INFO:iMPACT:1777 - 
Reading D:/Xilinx/14.3/ISE_DS/ISE/zynq/data/zynq7000_arm_dap.bsd...
----------------------------------------------------------------------
done.
PROGRESS_END - End Operation.
Elapsed time =      1 sec.
// *** BATCH CMD : identifyMPM 
// *** BATCH CMD : assignFile -p 1 -file "D:/AFDX IP Kit Zynq 7020/IP v1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit"
'1': Loading file 'D:/AFDX IP Kit Zynq 7020/IP v1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit' ...
done.
INFO:iMPACT - Using CseAdapterBSDevice
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
----------------------------------------------------------------------
INFO:iMPACT:501 - '1': Added Device xc7z020 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
INFO:iMPACT - Current time: 11/30/2015 19:38:15
// *** BATCH CMD : Program -p 1 
PROGRESS_START - Starting Operation.
INFO:iMPACT:583 - '1': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000000000000000000000000000010
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000011011100100111000010010011
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
INFO:iMPACT - Current time: 11/30/2015 19:40:00
// *** BATCH CMD : Program -p 1 
PROGRESS_START - Starting Operation.
INFO:iMPACT:583 - '1': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:1578 - '1':  Device IDCODE :        00000000000000000000000000000010
INFO:iMPACT:1579 - '1': Expected IDCODE:    00000011011100100111000010010011
PROGRESS_END - End Operation.
Elapsed time =      0 sec.

I am still not sure if I am attempting this properly or not, but this was the best I could determine.

Impact Scan & Program  30Nov2015.png
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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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The first thing I did when I unpacked the board was to run the Board Self-Test as described in the Quick Start Gude that came with the kit.  All 10 tests ran sucessfully.  This appears to align with the slides at the first link you provied, up through slide 26 (with the exeption of slide 8 [no  USB TypeA to Micro-B cable to the USB JTAG (Digilent) connector was used], and I am using v14.3 instead of v14.1 of the Xilinx software).

 

Would the procedure beyond slide 26 be helpful for further trouble shooting this issue?

If so, I can attempt them.

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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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I am still hoping for guidance/feedback.
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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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In an attempt to replicate the work of a colleague, I updated to ISE 14.5 (instead of 14.3 that I had been using initially).  When I tried to program the FPGA, I got a slightly different error.  Now instead of hanging indefinitely, it fails and gives me a output in the console.  I have attached a screenshot, but here is the content of the console:

 

17:19:51 INFO  : Time out for XMD transaction is 120000
If you want to increase the timeout value, goto Windows-> Preferences -> Xilinx SDK -> XMD Startup
17:19:51 ERROR : Timeout occured while waiting to get reply for command "xfpga  -f D:/AFDX IP Kit Zynq 7020/IP v1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit -debugdevice deviceNr 2 -report_progress"
17:19:51 ERROR : FPGA Configuration failed.

 

Does this provide any additional insight?

 

Programming FPGA screenshot 4Dec2015.png
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: ZC702 stuck trying to Program FPGA

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hi,

 

there are ready to download files given in the zc702 BIST. if you use the procedure as-is, it is expected to work.

 

the second recommendation as shown in the console is to increase time-out value in SDK. have you tried both of them?

 

--hs

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Visitor oldwindways
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Registered: ‎11-25-2015

Re: ZC702 stuck trying to Program FPGA

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It apears that the issue was due to the path of the bitstream containing spaces.  

D:/AFDX IP Kit Zynq 7020/IP v1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit

 

By removing the spaces and trying again I was able to get it to program sucessfully.

D:/AFDX_IP_Kit_Zynq_7020/IPv1.4/afdx_nhe_zynq7_bitstream_V1.4/demo_top.bit

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