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Observer hhahn
Observer
391 Views
Registered: ‎09-24-2018

ZC706 PSS IO pins

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UG954:

The PCA9548 U65 RESET_B pin 24 is connected to FPGA U1 bank 501 pin F20 via
level-shifter U25. FPGA pin F20 net IIC_MUX_RESET_B_LS must be driven High to enable I2C bus
transactions with the devices connected to U65.

 

Qe.: Pin F20 is dedicated to PSS IO, so it can not be activated

        by the PL.

        What is the strategy to drive pin F20 by the PS IO ?

 

Thx

Ha

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1 Solution

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Moderator
Moderator
279 Views
Registered: ‎07-31-2012

Re: ZC706 PSS IO pins

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Hi @hhahn,

From schematics of ZC706 it looks like the reset is pull-up i.e. high by default.

So there is no need of additional logic. But if you are trying to toggle the pullup then need to write to MIO_46 register which connects to F20 using C application or direct register access appropriately.

Regards

Praveen


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5 Replies
Moderator
Moderator
363 Views
Registered: ‎04-12-2017

Re: ZC706 PSS IO pins

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Hello @hhahn

 

This is written in UG954

i2c.JPG

Pin F20 controls U65 which is I2C bus transaction switch.

 

So if it's connected to PS IO developer or designer can write a logic which can be controlled over the processor part.

It can help to control the dynamic operation of I2C bus switch.

 

Hope this helps.

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Observer hhahn
Observer
353 Views
Registered: ‎09-24-2018

Re: ZC706 PSS IO pins

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Hi,

 

This is exactly what I  tried to do:  "designer can write a logic..."

 

So I defined a port   ICC_MUX_RESET_B_LS   in my Top Level design file.

 

But I got an LOC error during bitgen : 

  port  ICC_MUX_RESET_B_LS   cannot be located   on pin F20.

 

So, how can this pin F20 be activated ?

 

thx

Ha

 

 

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Observer hhahn
Observer
311 Views
Registered: ‎09-24-2018

Re: ZC706 PSS IO pins

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Hello,
 
unfortunately I've got no answer which solves this problem:
 

LOC error during bitgen : 

  port  ICC_MUX_RESET_B_LS   cannot be located   on pin F20.

 So, how can this pin F20 be activated ?

 
=> Does anybody in the support team can answer this ?
 
Thx & rgds
Ha
 
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Moderator
Moderator
280 Views
Registered: ‎07-31-2012

Re: ZC706 PSS IO pins

Jump to solution

Hi @hhahn,

From schematics of ZC706 it looks like the reset is pull-up i.e. high by default.

So there is no need of additional logic. But if you are trying to toggle the pullup then need to write to MIO_46 register which connects to F20 using C application or direct register access appropriately.

Regards

Praveen


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Observer hhahn
Observer
268 Views
Registered: ‎09-24-2018

Re: ZC706 PSS IO pins

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Hi Praveen,

Thank you, this will solve my problem !

rgds

Hans-W.

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