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Visitor mohidnabil
Visitor
1,333 Views
Registered: ‎10-03-2017

zcu102 board Cosimulation fail

I recently got a new zcu102 board and followed the 4 page instruction book that came along to set it up. I have vivado HLS 2017 and added the license file that came along. I wrote a simple program in vivado hls which works fine in simulation. It also synthesis without error. But when i run the cosimulation, it fails. It gives the following error:

 

ERROR: [Coretcl 2-106] Specified part could not be found. test1:solution1 

 

What could be the possible issue? 

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Xilinx Employee
Xilinx Employee
1,292 Views
Registered: ‎10-24-2013

Re: zcu102 board Cosimulation fail

Hi @mohidnabil

Can you please post the complete failing log file?

Thanks,Vijay
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Visitor mohidnabil
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1,285 Views
Registered: ‎10-03-2017

Re: zcu102 board Cosimulation fail

Starting C/RTL cosimulation ...

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.
INFO: [LIC 200-101] Checked out feature [xczu9eg-es1]
INFO: [HLS 200-10] Setting target device to 'xczu9eg-ffvb1156-1-i-es1'
INFO: [COSIM 212-47] Using XSIM for RTL simulation.
INFO: [COSIM 212-14] Instrumenting C test bench ...
Build using "C:/Xilinx/Vivado_HLS/2017.2/msys/bin/g++.exe"
Compiling apatb_gravity.cpp
Compiling core.cpp_pre.cpp.tb.cpp
Compiling test_core.cpp_pre.cpp.tb.cpp
Generating cosim.tv.exe
INFO: [COSIM 212-302] Starting C TB testing ...
test gravity
ans 30.000000
ans 40.000000
INFO: [COSIM 212-333] Generating C post check test bench ...
INFO: [COSIM 212-12] Generating RTL test bench ...
ERROR: [Coretcl 2-106] Specified part could not be found.
(DEBUG) -> -> prepare_ip{{verilog}} @ "autosim.tcl" => ERROR: "Run Vivado failed"
(DEBUG) -> vlog_sim_run{...} @ "autosim.tcl" => ERROR: "Run Vivado failed"
ERROR: [COSIM 212-4] *** C/RTL co-simulation finished: FAIL ***
11
while executing
"source C:/Users/mxn150230/vivado_projects/test1/solution1/cosim.tcl"
invoked from within
"hls::main C:/Users/mxn150230/vivado_projects/test1/solution1/cosim.tcl"
("uplevel" body line 1)
invoked from within
"uplevel 1 hls::main {*}$args"
(procedure "hls_proc" line 5)
invoked from within
"hls_proc $argv"
Finished C/RTL cosimulation.

 

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Moderator
Moderator
1,277 Views
Registered: ‎04-12-2017

Re: zcu102 board Cosimulation fail

Hello @mohidnabil,

 

Try selecting the extended temperature grade part.

The bitstream will be similar for both parts. Only the temperature grade changes.

part.PNG

Please check if this helps.

 

Thank you.

 

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Moderator
Moderator
1,259 Views
Registered: ‎06-24-2015

Re: zcu102 board Cosimulation fail

@mohidnabil

 

Have you installed the Zynq Ultrascale+ parts in Vivado?

Can you please share the xinstall.log present here: C:\Xilinx\.xinstall\Vivado_2017.2 

Thanks,
Nupur
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Visitor mohidnabil
Visitor
1,247 Views
Registered: ‎10-03-2017

Re: zcu102 board Cosimulation fail

Hi. I have attached the log file. Also i changed the board to extended temperature but i am still getting the same error.

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