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Observer
Observer
1,000 Views
Registered: ‎12-11-2017

7 series GPIO signal and clock

I'm trying to drive the GPIO SMA pins on my KC705 at 10 MHz with a pre-loaded bit sequence. I've made a module in Verilog that holds the bit sequence and I've connected a Clocking Wizard module to it to drive it at 10 MHz.

 

How do I drive the GPIO pins? Is my design correct?

 

The block diagram is below:

 

file.png

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Xilinx Employee
Xilinx Employee
992 Views
Registered: ‎06-02-2017

Re: 7 series GPIO signal and clock

Hi malharjere

From the block design, you need to make external clk_in1 and reset pins, and assign pinouts to thesetwo ports in the XDC file according to your board. Connect clk_in1 to the clk on the board.

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Observer
Observer
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Registered: ‎12-11-2017

Re: 7 series GPIO signal and clock

I don't have an XDC file right now, I'm just dragging and dropping components into block designer. Can I do it without creating an XDC file? Also, what do you mean by connect clk_in1 to the clk on the board? Where is the clock on the board?
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Xilinx Employee
Xilinx Employee
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Registered: ‎06-02-2017

Re: 7 series GPIO signal and clock

Do you want to test the design on the board or you just want to simulate?

If you want the design works on the board, you need to connect the output from Crystal on the board to the clock of your design. The function Clocking Wizard module is not generate a clock by itself, it need a clock input. 

Also you need a xdc file to assign the input/output signals of your design to the FPGA external pins.

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Observer
Observer
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Registered: ‎12-11-2017

Re: 7 series GPIO signal and clock

Ah I see, that makes more sense. I don't want to simulate, I want to test the design on my board and connect the SMA ports to an oscilloscope and verify that those transmitted bits are the same as the ones I load into memory initially.
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