All pins HIGH in SPARTAN 6

[DOZA]

Hi! 

I program (ISP) the flash memory via Spartan 6 by USB Platform Cable II. But I have some peripheral devices that are directly connected to the FPGA. And when I program the flash memory by USB Platform Cable II the FPGA set pins N5 and P4 (IO_L49P_D3_2 and IO_L63N_2) in HIGH. Somebody know how remove this behavior when I in-system program that flash via FPGA?  

Thanks!

[DOZA]

Solution for xc6slx45:
https://forums.xilinx.com/t5/FPGA-Configuration/Request-Spartan-6-Pull-ups-during-SPI-indirect-programming-using/m-p/891949/highlight/true#M9900

But I Need yet xc6slx9 and xc6slx16!

[drjohnsmith]

You might be on to a looser here,
As far as I remember, the choice is to have IO pulled up internally or to have them float during configuration.

This is set by an external pin,

Floating the outputs with out a pull up / down resistor externally, you don't know which level your going to have, so it may work today ,and not tomorrow.

Sorry, Sounds like its a mod / re spin.

[DOZA]

I think it's very useful remark. Do not forget to install weak pull-up/down resistors where it's necessary.