06-23-2020 12:30 AM - edited 06-23-2020 12:40 AM
I program (ISP) the flash memory via Spartan 6 by USB Platform Cable II. But I have some peripheral devices that are directly connected to the FPGA. And when I program the flash memory by USB Platform Cable II the FPGA set pins N5 and P4 (IO_L49P_D3_2 and IO_L63N_2) in HIGH. Somebody know how remove this behavior when I in-system program that flash via FPGA?
11-17-2020 04:53 AM - edited 11-17-2020 04:56 AM
But I Need yet xc6slx9 and xc6slx16!
11-17-2020 05:19 AM