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greg19606
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Registered: ‎03-18-2018

Artix 100T JTAG Problem

Hi Everyone, 

 

I'm finally working on bringing up my first attempt at an Artix board design. I've run into an interesting JTAG/Configuration related issue, and am not sure where to start to look while debugging it. 

 

It's a pretty basic board, Artix 100T, DDR3, bunch of diff pairs on a connector, MGTs setup for SATA and SDI out. 

I have it set to configure from SPI flash. Unfortunately I thought I had the right flash chip on hand, and didn't order one. 

Since the guides indicate that the JTAG should override, I thought I'd try seeing if I could configure the chip over JTAG without the flash populated.

 

Setup the board, connected a Digilent HS2. But no communication with the device. At this point I was concerned I screwed up, got poking around with my scope and found the expected config clock on the config flash footprint. Ok, so maybe not dead. 

 

Read a few posts, and reread the configuration manual and related sections of user guides. Seemed to make sense to try tying the INIT_B signal to ground. If I do this the device pops up on JTAG, I can read properties, verify the mode pins are set correctly, and view an assortment of voltages in XADC. 

 

So it seems the device is alive, connected to power properly. If at any point I let INIT_B go high, the device drops off the JTAG connection. If I try to program the device, it runs to 99%, then gives the error that DONE didn't assert and fails.

 

Is this the expected behavior if the device is set for flash config and no flash device is connected? Or does this indicate a problem with my design/layout? Any suggestions on things to check? (I would change the mode pins to JTAG only, but since I was running out of room on my board I didn't route them out...)

 

Thanks for any suggestions. 

Greg

 

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austin
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Registered: ‎02-27-2008

Not expected behavior at all,

 

Check all the connections.  Something is not wired correctly.  INIT_b asserted (grounded) hold off configuring (normally).

 

In your case, the device must be trying to configure (and never finishing).  INIT_b stops that, allows JTAG state machine to function.  What do you have the mode pins set at?

Austin Lesea
Principal Engineer
Xilinx San Jose
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greg19606
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Registered: ‎03-18-2018

 

This is how I have things setup. I double checked that the board matches, and that nothing was populated with the wrong value resistors. 

 

ConfiurationPins.PNG

 

This seems to match up correctly against UG470. I also tried populating the pull-up for the (not loaded flash chip), that didn't seem to change things.

 

Thanks for the help!

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austin
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Registered: ‎02-27-2008

You definitely require a DONE pullup,

 

Of the correct value!

Austin Lesea
Principal Engineer
Xilinx San Jose