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richterfhg
Observer
Observer
9,499 Views
Registered: ‎04-14-2011

Artix 7: SPI Multiboot with Fallback does not work

I have a problem to get Multiboot/Fallback working on Artix 7 (Trenz board TE0712). I have the following settings in the xdc file:

set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.CONFIGFALLBACK ENABLE [current_design]
set_property BITSTREAM.CONFIG.NEXT_CONFIG_ADDR 0X00800000 [current_design]
set_property BITSTREAM.CONFIG.NEXT_CONFIG_REBOOT ENABLE [current_design]
set_property BITSTREAM.CONFIG.TIMER_CFG 0X2FAF080 [current_design]
set_property BITSTREAM.CONFIG.USR_ACCESS 0xAAAAAAAA [current_design]
set_property BITSTREAM.GENERAL.CRC ENABLE [current_design]

 The Flash is a Spansion 256MBit SPI Flash, but as the design is only 3MByte I can use 24 bit SPI Adressing and 0x800000 start address for Update Image.

My build script first builds the design until implementation, after this, first the update file is built with following additional settings:

set_property BITSTREAM.CONFIG.USR_ACCESS 0xBBBBBBBB [current_design]
set_property BITSTREAM.CONFIG.TIMER_CFG 0X2FAF080  [current_design]
set_property BITSTREAM.CONFIG.CONFIGFALLBACK ENABLE [current_design]

 After write_bitstream for the update file, the golden image is built:

set_property BITSTREAM.CONFIG.NEXT_CONFIG_ADDR 0X00800000 [current_design]
set_property BITSTREAM.CONFIG.NEXT_CONFIG_REBOOT ENABLE [current_design]
set_property BITSTREAM.CONFIG.TIMER_CFG 0X2FAF080  [current_design]
set_property BITSTREAM.CONFIG.USR_ACCESS 0xAAAAAAAA [current_design]
set_property BITSTREAM.CONFIG.CONFIGFALLBACK ENABLE [current_design]

 

Even if I try to load only the golden Image, I get a bad packet error. Also if I build only the golden image file in Vivado GUI mode, I get bad packet error. I can´t see the mistake I made...

Here the start of the golden Image (from bin file):

        0001 0203 0405 0607 0809 0A0B 0C0D 0E0F - 0123456789ABCDEF
------------------------------------------------------------------
  0x00: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
  0x10: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
  0x20: 0000 00BB 1122 0044 FFFF FFFF FFFF FFFF - ...».".Dÿÿÿÿÿÿÿÿ
  0x30: AA99 5566 2000 0000 3003 E001 0000 000B - ª™Uf ...0.à.....
  0x40: 3000 8001 0000 0012 2000 0000 3002 2001 - 0.€..... ...0. .
  0x50: 42FA F080 3002 0001 0080 0000 3000 8001 - Búð€0....€..0.€.
  0x60: 0000 000F 2000 0000 3000 8001 0000 0007 - .... ...0.€.....
  0x70: 2000 0000 2000 0000 3001 A001 AAAA AAAA -  ... ...0. .ªªªª
  0x80: 3002 6001 0000 0000 3001 2001 022A 3FE5 - 0.`.....0. ..*?å
  0x90: 3001 C001 0000 0000 3001 8001 0363 6093 - 0.À.....0.€..c`“
  0xA0: 3000 8001 0000 0009 2000 0000 3000 C001 - 0.€..... ...0.À.
  0xB0: 0000 0001 3000 A001 0000 0101 3000 C001 - ....0. .....0.À.
  0xC0: 0000 1000 3003 0001 0000 1000 2000 0000 - ....0....... ...
  0xD0: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
  0xE0: 2000 0000 2000 0000 2000 0000 3000 2001 -  ... ... ...0. .
  0xF0: 0000 0000 3000 8001 0000 0001 2000 0000 - ....0.€..... ...

 

And the start of the Update Image (also from bin file)

      0001 0203 0405 0607 0809 0A0B 0C0D 0E0F - 0123456789ABCDEF
----------------------------------------------------------------
0x00: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
0x10: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
0x20: 0000 00BB 1122 0044 FFFF FFFF FFFF FFFF - ...».".Dÿÿÿÿÿÿÿÿ
0x30: AA99 5566 2000 0000 3003 E001 0000 000B - ª™Uf ...0.à.....
0x40: 3000 8001 0000 0012 2000 0000 3002 2001 - 0.€..... ...0. .
0x50: 42FA F080 3002 0001 0000 0000 3000 8001 - Búð€0.......0.€.
0x60: 0000 0000 2000 0000 3000 8001 0000 0007 - .... ...0.€.....
0x70: 2000 0000 2000 0000 3001 A001 BBBB BBBB -  ... ...0. .»»»»
0x80: 3002 6001 0000 0000 3001 2001 022A 3FE5 - 0.`.....0. ..*?å
0x90: 3001 C001 0000 0000 3001 8001 0363 6093 - 0.À.....0.€..c`“
0xA0: 3000 8001 0000 0009 2000 0000 3000 C001 - 0.€..... ...0.À.
0xB0: 0000 0001 3000 A001 0000 0101 3000 C001 - ....0. .....0.À.
0xC0: 0000 1000 3003 0001 0000 1000 2000 0000 - ....0....... ...
0xD0: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
0xE0: 2000 0000 2000 0000 2000 0000 3000 2001 -  ... ... ...0. .
0xF0: 0000 0000 3000 8001 0000 0001 2000 0000 - ....0.€..... ...

 

What do I wrong? thank you all.

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5 Replies
kkn
Moderator
Moderator
9,486 Views
Registered: ‎01-15-2008

can you share the command you used to create the mcs file.

Also if you try to remove the multiboot settings(in xdc) embedded in the golden bitstream do you still see issues in booting the golden image.

 

--Krishna

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richterfhg
Observer
Observer
9,480 Views
Registered: ‎04-14-2011

I let write_bitstream create the bin file. Without multiboot settings, the bin file works perfectly flashing over my design into the SPI flash.

Here the beginng of the update *.bit file:

        0001 0203 0405 0607 0809 0A0B 0C0D 0E0F - 0123456789ABCDEF
------------------------------------------------------------------
  0x00: 0009 0FF0 0FF0 0FF0 0FF0 0000 0161 0035 - ...ð.ð.ð.ð...a.5
  0x10: 4F50 4F46 3031 413B 434F 4D50 5245 5353 - OPOF01A;COMPRESS
  0x20: 3D54 5255 453B 5573 6572 4944 3D30 3041 - =TRUE;UserID=00A
  0x30: 4542 3030 313B 5665 7273 696F 6E3D 3230 - EB001;Version=20
  0x40: 3134 2E34 0062 000D 3761 3230 3074 6662 - 14.4.b..7a200tfb
  0x50: 6734 3834 0063 000B 3230 3135 2F30 312F - g484.c..2015/01/
  0x60: 3135 0064 0009 3136 3A31 353A 3130 0065 - 15.d..16:15:10.e
  0x70: 0037 1D54 FFFF FFFF FFFF FFFF FFFF FFFF - .7.Tÿÿÿÿÿÿÿÿÿÿÿÿ
  0x80: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
  0x90: FFFF FFFF 0000 00BB 1122 0044 FFFF FFFF - ÿÿÿÿ...».".Dÿÿÿÿ
  0xA0: FFFF FFFF AA99 5566 2000 0000 3003 E001 - ÿÿÿÿª™Uf ...0.à.
  0xB0: 0000 000B 3000 8001 0000 0012 2000 0000 - ....0.€..... ...
  0xC0: 3002 2001 42FA F080 3002 0001 0000 0000 - 0. .Búð€0.......
  0xD0: 3000 8001 0000 0000 2000 0000 3000 8001 - 0.€..... ...0.€.
  0xE0: 0000 0007 2000 0000 2000 0000 3001 A001 - .... ... ...0. .
  0xF0: BBBB BBBB 3002 6001 0000 0000 3001 2001 - »»»»0.`.....0. .
0x0100: 022A 3FE5 3001 C001 0000 0000 3001 8001 - .*?å0.À.....0.€.
0x0110: 0363 6093 3000 8001 0000 0009 2000 0000 - .c`“0.€..... ...
0x0120: 3000 C001 0000 0001 3000 A001 0000 0101 - 0.À.....0. .....
0x0130: 3000 C001 0000 1000 3003 0001 0000 1000 - 0.À.....0.......
0x0140: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
0x0150: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
0x0160: 3000 2001 0000 0000 3000 8001 0000 0001 - 0. .....0.€.....
0x0170: 2000 0000 3000 4065 0000 0000 0000 0000 -  ...0.@e........

 And the beginng of the golden Bit file:

        0001 0203 0405 0607 0809 0A0B 0C0D 0E0F - 0123456789ABCDEF
------------------------------------------------------------------
  0x00: 0009 0FF0 0FF0 0FF0 0FF0 0000 0161 0035 - ...ð.ð.ð.ð...a.5
  0x10: 4F50 4F46 3031 413B 434F 4D50 5245 5353 - OPOF01A;COMPRESS
  0x20: 3D54 5255 453B 5573 6572 4944 3D30 3041 - =TRUE;UserID=00A
  0x30: 4542 3030 313B 5665 7273 696F 6E3D 3230 - EB001;Version=20
  0x40: 3134 2E34 0062 000D 3761 3230 3074 6662 - 14.4.b..7a200tfb
  0x50: 6734 3834 0063 000B 3230 3135 2F30 312F - g484.c..2015/01/
  0x60: 3135 0064 0009 3136 3A31 363A 3436 0065 - 15.d..16:16:46.e
  0x70: 0037 1D54 FFFF FFFF FFFF FFFF FFFF FFFF - .7.Tÿÿÿÿÿÿÿÿÿÿÿÿ
  0x80: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF - ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
  0x90: FFFF FFFF 0000 00BB 1122 0044 FFFF FFFF - ÿÿÿÿ...».".Dÿÿÿÿ
  0xA0: FFFF FFFF AA99 5566 2000 0000 3003 E001 - ÿÿÿÿª™Uf ...0.à.
  0xB0: 0000 000B 3000 8001 0000 0012 2000 0000 - ....0.€..... ...
  0xC0: 3002 2001 42FA F080 3002 0001 0080 0000 - 0. .Búð€0....€..
  0xD0: 3000 8001 0000 000F 2000 0000 3000 8001 - 0.€..... ...0.€.
  0xE0: 0000 0007 2000 0000 2000 0000 3001 A001 - .... ... ...0. .
  0xF0: AAAA AAAA 3002 6001 0000 0000 3001 2001 - ªªªª0.`.....0. .
0x0100: 022A 3FE5 3001 C001 0000 0000 3001 8001 - .*?å0.À.....0.€.
0x0110: 0363 6093 3000 8001 0000 0009 2000 0000 - .c`“0.€..... ...
0x0120: 3000 C001 0000 0001 3000 A001 0000 0101 - 0.À.....0. .....
0x0130: 3000 C001 0000 1000 3003 0001 0000 1000 - 0.À.....0.......
0x0140: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
0x0150: 2000 0000 2000 0000 2000 0000 2000 0000 -  ... ... ... ...
0x0160: 3000 2001 0000 0000 3000 8001 0000 0001 - 0. .....0.€.....
0x0170: 2000 0000 3000 4065 0000 0000 0000 0000 -  ...0.@e........

 Even if I try to load the bit file (via Impact), the FPGA status register says bad packet error and the FPGA does not boot up.

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smarell
Community Manager
Community Manager
9,475 Views
Registered: ‎07-23-2012

Bad packet error occurs when the contents of bit file are corrupt.

Do you see the same issue with all the designs that you created?
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richterfhg
Observer
Observer
9,472 Views
Registered: ‎04-14-2011

Without multiboot settings the bitstream loads correct, both over JTAG and from flash. This is our first Artix design where multiboot is required. Any suggestions?

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richterfhg
Observer
Observer
9,445 Views
Registered: ‎04-14-2011

I tried to build a multiboot design in ISE for testing. But the error is the same:

1: Device Temperature: Current Reading:   44.47 C, Min. Reading:   43.48 C, Max. Reading:   44.96 C
1: VCCINT Supply: Current Reading:   0.993 V, Min. Reading:   0.993 V, Max. Reading:   0.996 V
1: VCCAUX Supply: Current Reading:   1.796 V, Min. Reading:   1.793 V, Max. Reading:   1.799 V
'1': Reading bootsts register contents...
[0] VALID_0 - ERROR OR END OF STARTUP (EOS) DETECTED                       :         0
[1] FALLBACK_0 - FALLBACK TRIGGERED RECONFIGURATION                        :         0
[2] IPROG_0 - INTERNAL WARMBOOT (IPROG) TRIGGERED RECONFIGURATION          :         0
[3] WTO_ERROR_0 - WATCHDOG TIME OUT ERROR                                  :         0
[4] ID_ERROR_0 - FPGA DEVICE IDCODE ERROR                                  :         0
[5] CRC_ERROR_0 - CYCLIC REDUNDANCY CHECK (CRC) ERROR                      :         0
[6] WRAP_ERROR_0 - BPI FLASH ADDRESS COUNTER WRAP AROUND ERROR             :         0
[7] HMAC_ERROR_0 - HMAC ERROR                                              :         0
[8] VALID_1 - ERROR OR END OF STARTUP (EOS) DETECTED                       :         0
[9] FALLBACK_1 - FALLBACK TRIGGERED RECONFIGURATION                        :         0
[10] IPROG_1 - INTERNAL WARMBOOT (IPROG) TRIGGERED RECONFIGURATION         :         0
[11] WTO_ERROR_1 - WATCHDOG TIME OUT ERROR                                 :         0
[12] ID_ERROR_1 - FPGA DEVICE IDCODE ERROR                                 :         0
[13] CRC_ERROR_1 - CYCLIC REDUNDANCY CHECK (CRC) ERROR                     :         0
[14] WRAP_ERROR_1 - BPI FLASH ADDRESS COUNTER WRAP AROUND ERROR            :         0
[15] HMAC_ERROR_1 - HMAC ERROR                                             :         0
'1': Reading status register contents...
[0] CRC ERROR                                                              :         0
[1] DECRYPTOR ENABLE                                                       :         0
[2] PLL LOCK STATUS                                                        :         1
[3] DCI MATCH STATUS                                                       :         1
[4] END OF STARTUP (EOS) STATUS                                            :         0
[5] GTS_CFG_B STATUS                                                       :         0
[6] GWE STATUS                                                             :         0
[7] GHIGH STATUS                                                           :         1
[8] MODE PIN M[0]                                                          :         1
[9] MODE PIN M[1]                                                          :         0
[10] MODE PIN M[2]                                                         :         0
[11] INIT_B INTERNAL SIGNAL STATUS                                         :         1
[12] INIT_B PIN                                                            :         1
[13] DONE INTERNAL SIGNAL STATUS                                           :         0
[14] DONE PIN                                                              :         0
[15] IDCODE ERROR                                                          :         0
[16] SECURITY ERROR                                                        :         0
[17] SYSTEM MONITOR OVER-TEMP ALARM STATUS                                 :         0
[18] CFG STARTUP STATE MACHINE PHASE                                       :         0
[19] CFG STARTUP STATE MACHINE PHASE                                       :         0
[20] CFG STARTUP STATE MACHINE PHASE                                       :         0
[21] RESERVED                                                              :         0
[22] RESERVED                                                              :         0
[23] RESERVED                                                              :         0
[24] RESERVED                                                              :         0
[25] CFG BUS WIDTH DETECTION                                               :         0
[26] CFG BUS WIDTH DETECTION                                               :         0
[27] HMAC ERROR                                                            :         0
[28] PUDC_B PIN                                                            :         1
[29] BAD PACKET ERROR                                                      :         1
[30] CFGBVS PIN                                                            :         1
[31] RESERVED                                                              :         0

 I set up a simple design, only routing one pin to another. Here the bitgen settings for update file:

-w
-g Binary:yes
-g Compress
-g CRC:Enable
-g ConfigRate:50
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullUp
-g ProgPin:PullUp
-g InitPin:Pullup
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g Disable_JTAG:No
-g UnusedPin:PullDown
-g UserID:0xBBBBBBBB
-g ExtMasterCclk_en:Disable
-g ConfigFallback:Enable
-g BPI_page_size:1
-g BPI_sync_mode:Disable
-g SPI_32bit_addr:No
-g SPI_buswidth:1
-g SPI_Fall_Edge:No
-g OverTempPowerDown:Disable
-g USR_ACCESS:None
-g JTAG_XADC:Enable
-g DCIUpdateMode:AsRequired
-g StartUpClk:CClk
-g DONE_cycle:4
-g GTS_cycle:5
-g GWE_cycle:6
-g Match_cycle:Auto
-g Security:None
-g ICAP_select:Auto
-g DonePipe:Yes
-g Encrypt:No

 And for golden file:

-w
-g Binary:yes
-g Compress
-g CRC:Enable
-g ConfigRate:50
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullUp
-g ProgPin:PullUp
-g InitPin:Pullup
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g Disable_JTAG:No
-g UnusedPin:PullDown
-g UserID:0xAAAAAAAA
-g ExtMasterCclk_en:Disable
-g ConfigFallback:Enable
-g BPI_page_size:1
-g BPI_sync_mode:Disable
-g SPI_32bit_addr:No
-g SPI_buswidth:1
-g SPI_Fall_Edge:No
-g OverTempPowerDown:Disable
-g USR_ACCESS:None
-g next_config_reboot:Enable
-g next_config_addr:0x00800000
-g JTAG_XADC:Enable
-g DCIUpdateMode:AsRequired
-g StartUpClk:CClk
-g DONE_cycle:4
-g GTS_cycle:5
-g GWE_cycle:6
-g Match_cycle:Auto
-g Security:None
-g ICAP_select:Auto
-g DonePipe:Yes
-g Encrypt:No

 Can you help me with this issue? We need the multiboot for save firmware update...

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