09-19-2019 02:46 AM
I've a design connecting bank 14 to DDR3L, ideally at 1.35V
The configuration guide clearly states that if used for configuration, VCCO_14 and VCCO_0 should be the same voltage.
I can't see anything in the data sheet which precludes this, but configuration at this voltage level isn't explicitly supported in the configuration guide UG470. 1.5V is explicitly supported, 1.2V is explicitly not. Can i use 1.35V?
09-19-2019 03:11 AM
If your using the device outides the documented voltages, then your on your own, and yo uneed to simulate the ibis model to check,
I have seen similar questoins a few time sover the last few months,
but no one say why they want to do this sort of thing
may be you could enlighten us.
09-19-2019 03:26 AM
The design is explicitly within the datasheet specified operating voltages.
The only cause for concern is that the datasheet and UG470 conflict in support for configuration at 1.2V. (The data sheet specifies this as a valid voltage, UG470 explicitly mentions it as unsupported).
Given the voltage i'd like to use is 1.35V, this makes me uneasy, and i'm seeking clarification.
Why is easy - I've a fully utilised IO design, but need to share bank 14 doing DDR3L with SPI configuration. My options are: run at 1.35V and sort the levels out to the flash, or switch bank voltages after configuration. Power is everything, and 1.5V is not acceptable.