UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
7,619 Views
Registered: ‎06-30-2014

Boundary Scan Manual

I`m an engineer in OJSC "Tact", located in Russia, Perm. We are using Virtex7 FPGA xc7vx415tffg1157 in our own progect.

Now we are having troubles with providing an boundary scan for this fpga.

In our progect we need to inspect are all fpga pins for short circuits and for other probable problems. 

We only have a bsd file like such(see includes), Platform Cable II and a JTAG header on our board.

Which software and hardware things I have to use and in which sequence of steps to supervise over all 1927 pins?

If you can help - add me in skype or sand an email:

My contacts are:

anton-kornilkov@yandex.ru

antoshkakornilkov

 

Hope see your answers soon,

Anton Kornilkov

0 Kudos