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venugopal.kulkarni
Contributor
Contributor
565 Views
Registered: ‎11-06-2019

Bram Utilization

Hi all. I am Using "XCZU4EV-SFVC784-1-e". The device utilization report is given in the screenshot. LUT 75% and BRAM 98%. Can you suggest me what can i do to reduce it. I have already removed all the debug cores. Thanks in advance
utilization_7jan2020.jpg
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yangc
Xilinx Employee
Xilinx Employee
546 Views
Registered: ‎02-27-2019

Hi @venugopal.kulkarni ,

You can type report_utilization -name utilization_1 to check which module consumes the most BRAM, and then, you can optimize it. For example, you can specify distributed RAM rather than BRAM.

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venugopal.kulkarni
Contributor
Contributor
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Registered: ‎11-06-2019

Hi Yangc. When i saw the utilization report all the BRAM cell is being used by IP like "AXI_interconnect, DDR4, xdma,etc. "which cannot be replaced. m attaching another screenshot here. What can be the possible solution?
BRAM_utilization_7jan2020.jpg
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yangc
Xilinx Employee
Xilinx Employee
523 Views
Registered: ‎02-27-2019

If you confirm that these IPs have no options about RAM style, you can try synthesis setting "-max_bram" options.

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drjohnsmith
Teacher
Teacher
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Registered: ‎07-09-2009

Your also failing timing, probably not helped by congestion,
As your number of LUTs used is also so high, moving even one BRAM to LUTs will probably exceed your number of LUTS available.

Looks like you need to go for a bigger device there, looks like the ZU5 fits in the same footprint,

https://www.xilinx.com/support/documentation/selection-guides/zynq-ultrascale-plus-product-selection-guide.pdf#CG
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