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pgigliotti_usac
Explorer
Explorer
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Registered: ‎10-22-2020

Bypassing ID CODE check

We currently use Micron MT25QL02G  FLash devices to configure our Aritx 7 FPGAs.  Due to lead times going through the roof, we would like to use an Windbond W25Q02JVTBIM device, due to availability.  It is not listed in the UG nor in the software (Vivado 2020.1) as a supported device.  I saw the case below, and it looks like the ID CODE check will  prevent us from being able to program the device with VIVADO. Well, at least that was the case in 2018.  Is this still true?

It would be nice to have a workaround. If we cant get the configure the FPGA, we wont be ordering FPGAs until we can.

https://forums.xilinx.com/t5/FPGA-Configuration/Using-winbond-SPI-flah-for-Artix-XC7a35T/m-p/859554

 

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drjohnsmith
Teacher
Teacher
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Registered: ‎07-09-2009

As I understand it ,

The bit you have to consider, is the boot sequence.

   At boot, the FPGA has to read the data from the Flash,

      Flashes have different ways of being read, so the FPGA has to know what to do to read th eflash,

All flash parts have a unique ID, with a standard way of being read,

     so the FPGA at start up has to read the ID, and then behave accordingly.

And that part has to be hard code into the FPGA silicon.

Hence why only certain flash are supported.

 

I could be wrong, but that's what I have understood over the decades, 

   

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pgigliotti_usac
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Explorer
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Registered: ‎10-22-2020

Yes, that complicates it. Generally they use the same opcodes for read/write/erase instructions, but then a lot of them have extra instructions for things like sector protect and others. I would expect Xilinx, in the silicon would only support the bare minimum CFI instructions. Certainly they have different timings, and generally when you write to a location, you would read the status register to see if the flash internal write succeeded before moving on. If we could bypass the ID check, as we could in early versions, you could test to see if it is compatible. Not Ideal, but we are seeing 52 week lead times on some parts, and need to find a work around.

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drjohnsmith
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Registered: ‎07-09-2009

I hope Xilinx have a work around for this ,

   I'd also like to hear of Xilinx if what I have understood all these years is correct ,

As I read around , I have seen a line saying that "an external programmer can be used" 

   but not certain how that fts in with the boot operation.

don't give up till Xilinx has replied. 

 

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pgigliotti_usac
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Registered: ‎10-22-2020

Well, I believe with the third party programmer they may be talking about out of system programming "direct" programming. THat is to say program them before you put them down. To program them in system, you need to use an "indirect" programming method. This basically means you use the FPGA to program the flash.  What Xilinx does is puts a design into the FPGA that allows the programming software to send the file over to the FPGA which then exercises the SPI interface to program the FLASH. I doubt that any third party is putting a design into the FPGA to access the FLASH. I could see a FLASH vendor wanting to do this, but it would probably be cheaper/better for them to work with Xilinx to get there part supported by the Xilinx design/tools

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drjohnsmith
Teacher
Teacher
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Registered: ‎07-09-2009

Its a thought, 

   but if the FPGA only uses "generic" timings / codes, then it might be possible to programme off board, and then solder. but it does mean you could not in circuit update !

 

I await a Xilinx confirmation

 

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ddn
Moderator
Moderator
165 Views
Registered: ‎06-06-2018

@pgigliotti_usac ,

Only way now for your query is : 

>> Program your W25Q02JVTBIM flash with 3rd party programmers (i.e Direct SPI Programming).

>> Then you need mount that Flash on your custom board and then boot the FPGA using that flash.

P.S : Due to absence of Vivado generated SPI Controller file, 3rd party programmers may not be able to program the Flash using Indirect Programming method.

Regards,
Deepak D N
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