cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
710 Views
Registered: ‎07-08-2015

Check crc when reading bitstream from prom using .mcs format

Jump to solution

I uploaded the prom in mcs format.
When downloading bitstream from prom, does FPGA check crc for bitstream?

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Moderator
Moderator
660 Views
Registered: ‎06-05-2013
As @thakurr said, it does check for CRC error. Now there might be a case where it ignores the CRC check.
During configuration FPGA look for SYNC word to start the configuration. In case where synchronization was lost, any subsequent commands not understood including the command to check the CRC. i.e. extraneous SPI bus activity from possibly moving the FPGA configuration logic to an unexpected state. In this situation, configuration fails with DONE Low and INIT_B High because the CRC was ignored. You can check more on startup phase in UG470 page#90 https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

Hope it helps.
Thanks
Harshit
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

0 Kudos
2 Replies
Highlighted
Moderator
Moderator
701 Views
Registered: ‎09-15-2016

Hi @wio000

Yes, it does check the CRC while you boot from the flash. You can check this in the Hw manager under device properties. The configuration status registers will show CRC=0 if loading the data is successful, on the other hand it shows CRC=1 if data is corrupted/misaligned.

Regards
Rohit
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------

Highlighted
Moderator
Moderator
661 Views
Registered: ‎06-05-2013
As @thakurr said, it does check for CRC error. Now there might be a case where it ignores the CRC check.
During configuration FPGA look for SYNC word to start the configuration. In case where synchronization was lost, any subsequent commands not understood including the command to check the CRC. i.e. extraneous SPI bus activity from possibly moving the FPGA configuration logic to an unexpected state. In this situation, configuration fails with DONE Low and INIT_B High because the CRC was ignored. You can check more on startup phase in UG470 page#90 https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

Hope it helps.
Thanks
Harshit
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

0 Kudos