Combine FPGA code and "other data" in Flask

[dindea]

Can I combine the FPGA code for a SPARTAN 6 with other data in a '.bit' file to load into Flash? The application in the FPGA will use these "other data". It could be e.g. a table over one period of the sine function.

How large will the code for a XC6SLX9 be? Always the same or dependent upon the complexity of the Application? Where could I let the "other data" begin? How do I format the '.bit' file? Shall I have one '.bit' file for the FPGA code and one for the "other data"?

/dindea

[drjohnsmith]

The size of the bit file for any particular FPGA, is inherently fixed, as on every configuration, every bit of the FPGA that can be configured is set to a 1 or a 0.

Adding data to a bit file, you can't do as such,
the programming tools are designed to check the bit file length, and have error checking built in, so if you "modify" the bit file, the programming will fail.

Refer back to previous forum post
https://forums.xilinx.com/t5/FPGA-Configuration/Storing-user-defined-data-in-a-configuration-flash-memory/m-p/1090080

[dindea]

Thank you.

I am not very surprised at your answer. It seems the way to go is to write my own application,
more correct my two applications: One in VHDL for the FPGA and one in (e.g.) C++ to send the
data to the FPGA over USB.

Is the FPGA erased when I upload the FPGA code? If not, it will not make difference which I do first: Upload the FPGA code or
write my own data.

/dindea

[drjohnsmith]

FPGAs form xilinx are SRAM based,
they need configuring on every power on.

There are many methods of configuring the FPGA, if you need user data in there, the common solution is to use an external processor to do configure the FPGA from its memory,

something like this
https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf

this is a good referance
https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

[bruce_karaffa]

If you need to use the flash to hold some data that can be accessed while the FPGA is configured, you probably need to use the ICAP primitive.  Look in the Spartan6 FPGA Configuration User's Guide UG380.