03-21-2018 11:41 AM
I have some few questions about FPGA (SPARTAN 7) configuration. See the attached '.pdf' file.
Is my conclusion correct, that FPGA code can be uploaded to the flash memory over the JTAG path?
03-21-2018 02:06 PM
I think you want to do what's called indirect programming.
This will work in Vivado.
03-22-2018 01:54 PM
Quotation from "vivado-programming-debugging ..", ch 6:
Vivado can also indirectly program select Flash-based configuration
memory devices via JTAG. Do this by <i>first programming the Xilinx FPGA device with a
special configuration that provides a data path between JTAG and the Flash device interface</i>
followed by programming the configuration memory device contents using this data path.
What's that within <i>,</i> (HTML for italic)? Is it included in Vivado or is it something I would have to write myself?
And will it make difference if JTAG comes/goes from/to a USB circuit on the board or from/to a 'Platform Cable USB II'?
(It's difficult for me to see it would...)
And it is still un-answered what "Platform Cable USB II" contains more than the USB circuit (e.g. FT2232D) and possibly the configuration EEPROM. (Would the EEPROM be at all needed? MPSSE mode is set with a USB command when circuit is in the UART mode, which is the default taken on with absent or empty EEPROM).
(The '.pdf' in the original post is repeated )
03-22-2018 02:50 PM
I dont know why you would be seeing the HTML tag for italics. I dont see it in the PDF on the web.
I missed your cable question.
Have a look at the DS. If you don't find the answer in there please let me know.
03-23-2018 04:40 AM
I added the HTML tag.
I understand that the "Platform Cable ..." contains more than the USB circuit, s.a. among others the high-current buffers etc. .
A couple of questions remain:
Is there any difference between JTAG to/from "Platform Cable ..." via a connector, or direct from a USB circuit on the board? I can't see there would be...
Is the "bootstrap" required for indirect programming of the Flash included in Vivado (Impact), or is it something I would have to write myself?
Are there pieces of source code available, which I could use to write my own FPGA load utility, so I won't have to start Vivado or have it installed? I might want to use the board on an other computer, older with weaker processor (Pentium, Centrino, etc; not even a 'i3'), 2GB or less of memory, and a small hard disk (67 GB or so), where the several GigaBytes of Vivado will be a little too much...