Configuration modes menu missing in Vivado WebPack

[ninjanymo]

I am going through UG899 - I/O and Clock Planning, where on p. 19, figure 2-2 shows a configuration modes menu under Tools->Edit Device Properties which is not available in my version of Vivado, as I use the free WebPack version of the Design Suite.

I can see all the other options, only configuration modes is missing.

Whats up with that? I am suspecting that the feature is not available in the WebPack, or maybe it has been moved to another menu?

[harshit]

Please open the implemented design and try to change them. Here is the snapshot

[ninjanymo]

I'm not sure if I follow.

From UG899 I was under the impression that I could create an I/O Planning project before having any implemented designs, and I guess I should have specified that in my original post I was referring to the menus in an I/O Planning project.

I am thinking that I might have misunderstood the PCB design process. They way I thought I could do it was something like this:

1. Create an I/O planning project where I decide which external hardware is connected to which package pins as well as which MIO pins that are availiable on the package pins.
2. Import those settings into an RTL project and create a block design there.
3. Export that to the SDK to create application code.

Did I get this wrong? If so, I guess I should create a separate forum post asking for the correct design process.

[harshit]

Updating or adding the configuration mode requires some XDC constraints. To update the existing constraints file you need to open the implemented design. In your case you can add those constraints directly to the xdc file and set the configuration properties.

For example:

set_property CONFIG_MODE <value> [current_design]

For using the GUI mode to select the appropriate configuration mode you need to open the design and update the required xdc.

I thought you were looking for the following window:-

Thanks

harshit

[ninjanymo]

I'm still not sure if I understand. I'm completely new to the Zynq-7000s.

What I want to do is to define a board preset to use in an RTL Project where I will create a block design and then export that to the SDK to write application code in C.

I've worked with both the MicroZed and ZedBoard, and in both cases I loaded pre-made board presets.

Now I'm developing an in-house PCB, which features two UART interfaces, two CAN-FD interfaces (to be used with the CAN-FD LogiCore, i.e. it requires 4 PL pins to interface with external PHYs), external QSPI Flash and let's say one LED and one button.

From UG899 I was under the impression that I could do the board definitions from an I/O planning and select which physical package pins are available for the UARTs, the QSPI and the PL, as well as all minimum pin requirements such as clocks and reset circuitry before i do anything about the block design and SDK using an RTL Project.

I have a meeting today with a supervisor that might be of use. However, please point me in the right direction if I got this wrong.

Basically, I want to create the XDC constraints for the PCB that I will develop.

[harshit · Accepted solution]

Configuration menu which you referred from UG899 is what you usually get when you open the implemented design. 

For Zynq devices this tutorial might be helpful https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug1165-zynq-embedded-design-tutorial.pdf 

Check page#17-19. I think you might be looking for MIO configuration menu to define the IO

[ninjanymo]

That was the datasheet my life was missing. Thanks and you will (100%) see me around here later.

I just want to add that the reason we went for the Xilinx platform is partly due to the amazing support you provide here. Much appreciated!