01-13-2017 06:58 AM
I am using Xilinx Virtex UltraScale FPGA (VCU108). After 2 days of trying to configure the SysMon, I can still not figure out why temp_out (10 bit bus) is stuck to 0. I have activated it via wizard and am using AXI4-Lite. I can get ther user temp alarm working but not the bus. Is this a bug? I was not expecting a simple bus to be so complicated, that too while using a management wizard to configure it.
01-13-2017 08:39 AM
Do you have the verilog (or VHDL) module to put the data into your registers? In VU, there needs to be a state machine to read the sysmon through the internal SDI interface from the programmable logic to the sysmon ug580.
01-16-2017 12:45 AM
Thank you for the response. I am running the vcu108_ipi example in Vivado 2016.4. It already has all the components connects. I have only written one additional module that reads temp_out and temp_user_alarm_out. The user alarm is working fine and setting and resetting according to settings but temp_out is always giving a 0 output.
01-18-2017 12:47 AM
Still having the same problem after regenerating everything and running design from scratch. I am surprised at how hard it is being to run an official example provided by xilinx. I can load the simulation file now by manually pointing to its path but it has not been much useful.
01-19-2017 12:50 AM
So here are the screenshots of config of the sys management wizard and I have also attached the OP of the ILA. As you can see the last signal is temp_out that is always set to 0. Any ideas what might be causing this?