cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
13,370 Views
Registered: ‎03-18-2013

DONE pin stays high from power on when configuring spartan 6 fpga using xcf16p PROM.

Jump to solution

Dear all,

 

In our custom-board, we found that the status of the DONE pin remains high right from power up. Since this is connected to the CS_B pin of the XCF16P PROM, it is never enabled and thus the configuration is unsuccessful. What is the best way to find out the reason why the DONE pin stays HIGH?

 

Also, note that this issue arose soon after spraying acrofoam on the board.

 

Jayakrishna

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Professor
Professor
25,550 Views
Registered: ‎08-14-2007

You might also have a bad solder joint on the DONE ball.  If unconnected, the pullup will control the line.  My standard trick to see if a BGA ball is not soldered without resorting to X-ray is to isolate the pin by lifting pins or removing other devices on the board if possible, or as a last resort cutting an etch line.  Then use a meter in "diode check" mode with the positive lead connected to ground and the negative lead on the circuit board net.  If there is a connection, you will see about 0.5V from the clamp diode in the BGA.

-- Gabor

View solution in original post

7 Replies
Highlighted
Moderator
Moderator
13,359 Views
Registered: ‎01-15-2008

do you control on prog_b signal on the board? can you pulse that after power up and can you check the init_b signal as well during this operation ...

share the observation on this

Also after this capture the status signals of the fpga and post it to this thread

 

0 Kudos
Highlighted
13,352 Views
Registered: ‎03-18-2013

I tried using PROG_B as well... But no effect. No transition can be seen on the DONE pin. It stays high indefinitely. I tried forcefully pulling it down by a resistor connected to ground. This worked some times with CCLK toggling continously even after configuration is completed. I will share the waveforms as soon as i get them.

0 Kudos
Highlighted
Explorer
Explorer
13,330 Views
Registered: ‎11-25-2014

If you have a JTAG connection can you see the device in the JTAG chain? If so, can you program it via JTAG?

 

This sounds like a board-level problem to me, like an assembly problem (pins shorted or not connected), a pinout error, power supply, etc.

 

Do you have a second board you can test to see if it behaves the same way?

0 Kudos
Highlighted
13,326 Views
Registered: ‎03-18-2013

I have no problem programming the FPGA as well as the PROM via JTAG interface. I could actually verify the content in PROM as well (with the verify option). The problem arises only with Master selectmap interface configuration mode. We have tested 45 boards till date. We haven't had any problem with rest of the boards. I wonder why the done pin doesn't go low at all. I am actually planning to check if it goes low when i unpopulate the PROM from the board. 

 

I checked the Bank 2 supply. It seems to be OK.

0 Kudos
Highlighted
Explorer
Explorer
13,322 Views
Registered: ‎11-25-2014

Good that all of the other boards work. My first guess would be an assembly problem. Look at the pinout and see what pins are adjacent to DONE. If there's a power pin adjacent try measuring the resistance from DONE to that rail and see if there's a short. Good luck.

Highlighted
Professor
Professor
25,551 Views
Registered: ‎08-14-2007

You might also have a bad solder joint on the DONE ball.  If unconnected, the pullup will control the line.  My standard trick to see if a BGA ball is not soldered without resorting to X-ray is to isolate the pin by lifting pins or removing other devices on the board if possible, or as a last resort cutting an etch line.  Then use a meter in "diode check" mode with the positive lead connected to ground and the negative lead on the circuit board net.  If there is a connection, you will see about 0.5V from the clamp diode in the BGA.

-- Gabor

View solution in original post

Highlighted
13,277 Views
Registered: ‎03-18-2013

Thanks for your help, guys. It seems like we have a dry solder issue at the DONE pin of FPGA.

0 Kudos