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josephg
Observer
Observer
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Registered: ‎05-29-2018

Debugging with JTAG - dbg_hub core problem - how to get free running clock?

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Hi there.

 

I am using Vivado and would like to debug my desing using JTAG. I followed the guide at:
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_1/ug936-vivado-tutorial-programming-debugging.pdf

 

When i try to program the board I get the following message:

WARNING: [Labtools 27-3361] The debug hub core was not detected.
Resolution: 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
WARNING: [Labtools 27-3403] Dropping logic core with cellname:'u_ila_0' from probes file, since it cannot be found on the programmed device.

It think the problem is the free running clock, but i don't know how to configure the clock in such a way.

 

Thank you very much for any help.

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josephg
Observer
Observer
1,433 Views
Registered: ‎05-29-2018

The clock is comming from the Zynq processing system. I am sure the clock is working as I can run an applicaion with the SDK.

Also I am confident that I use the correct ltx file.

 

I checked the schematic and the clock is connected correctly.

 

Maybe I don't have a free running clock, but I was not able to determine that. Maybe a clock from the PS is not free?

 

EDIT: found the problem. It was really the clock. Had to start everything with the SDK. Now it is working.

View solution in original post

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klasha
Adventurer
Adventurer
1,253 Views
Registered: ‎05-23-2018

Make sure that the clock is there. Verify that the source oscillator is oscillating, and that there's no way for the MMCMs and BUFs in between to be deactivated (Reset, Clock-Enables).

 

Where is your clock coming from?

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zhiq
Xilinx Employee
Xilinx Employee
1,223 Views
Registered: ‎06-02-2017

Hi,

 

This warning may be caused by two conditions. The first is only download bit file without ltx file. The second is the ila clock is missing. Please check the ila clock and ensure the correct ltx file have been download into device with bit file.

 

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josephg
Observer
Observer
1,434 Views
Registered: ‎05-29-2018

The clock is comming from the Zynq processing system. I am sure the clock is working as I can run an applicaion with the SDK.

Also I am confident that I use the correct ltx file.

 

I checked the schematic and the clock is connected correctly.

 

Maybe I don't have a free running clock, but I was not able to determine that. Maybe a clock from the PS is not free?

 

EDIT: found the problem. It was really the clock. Had to start everything with the SDK. Now it is working.

View solution in original post

0 Kudos