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Newbie ananya.dlrl
Newbie
2,470 Views
Registered: ‎02-01-2017

How to Disable Read Back

Hi,

 

We are using Virtex-4 and Virtex-5 FPGAs in our designs. In some designs, we are using Xilinx PROMs and in some designs,

we are using JS28F512P33TFA Flash in BPI mode.

 

How can we protect our configuration files?

We are not using any encryption as we have not provided any option for battery backup. We tried to disable Read Back option during BitGen. Even if we are disabling Read Back, we are able to read  from FPGA and Flash memory.

Can you please suggest how to disable it?

1 Reply
Explorer
Explorer
245 Views
Registered: ‎08-31-2016

Re: How to Disable Read Back

Hi @ananya.dlrl
Did you get solution for this post?
Please share on how did you disable Read Back in Vivado.

Regards,
Vinay
Vinay Shenoy
0 Kudos