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Observer
Observer
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Registered: ‎07-25-2019

How to Read Write Bitstream of an FPGA from Its Configuration Memory

I am working on SEU, SEL mechanism of FPGAs. Most of the work is focused on configuration memory of FPGAs and experiments conducted by writing a known bitstream and reading it back from the configuration memory while FPGA is under radiation. In order to move further in my research i need to be able to write a bitstream defined by me into FPGA using a custom tool or Vivado, ISE or some other thing, more importantly i need to read the configuration memory of FPGA where all the configuration of it is done here. In studies that I have read, writers mentioned some tools such as "FIVIT" in order to read/write to FPGA config-memory over JTAG however, I couldn't find any further information about this tool. I would appreciate any experience or information on this topic. Thanks in advance.

Edit: Board that I'm dealing with is Xilinx Zynq-7020, particular model may not be so differantiating from other Xilinx models or any other brands

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418 Views
Registered: ‎07-23-2019

Re: How to Read Write Bitstream of an FPGA from Its Configuration Memory

You can access the configuration memory as a normal memory once the FPGA is up and running.

I did that to upload new configurations to a QSPI. Just add the proper interface to the memory type. then somewhere you tell it's the config memory.

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Explorer
Explorer
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Registered: ‎09-13-2011

Re: How to Read Write Bitstream of an FPGA from Its Configuration Memory

I think you can use the ICAP component from within the FPGA to read the configuration and then compare it to values that you read from the configuration device. If for instance you program the FPGA using a Flash device, then after programming is finished you should be able to read again from Flash device and compare it with contents from the ICAP.

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Observer
Observer
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Registered: ‎07-25-2019

Re: How to Read Write Bitstream of an FPGA from Its Configuration Memory

Could you explain what ICAP component is?
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377 Views
Registered: ‎07-23-2019

Re: How to Read Write Bitstream of an FPGA from Its Configuration Memory

ICAP is an IP block in the IP catalogue that you can drop into a block design to use it. From the IP catalogue, you can access the product web page and datasheet.

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Explorer
Explorer
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Registered: ‎09-13-2011

Re: How to Read Write Bitstream of an FPGA from Its Configuration Memory

I think the ICAP (ICAPE2) can only be instantiated. It is somewhat difficult to find good information on the component, there's little in UG953 and UG470, almost like it's a secret part of the FPGA. Various pieces of information can be found in the forum and answers. I haven't used it myself, just know of a project that uses it for Single Event Upset detection.