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Participant lanxiang.ben
Participant
7,241 Views
Registered: ‎04-08-2014

How to constraint BPI flash pin of FPGA when controlling BPI flash by user logic?

Hi All

    Refer to 《ug470_7Series_Config.pdf》,I know that "After configuration is DONE,these pins become user I/Os and can be controlled by user logic to access BPI flash for user data storage and programming."(Page 127).Now, I want to do it, The flash is used for configure FPGA (MCS file) original. After Synthesis and Implementation, There are some errors during Write Bitstream as ancessory, So I want to know:

(1) Can I constraint my user logic port to these FPGA pins?Refer to ug470,I think it should be. But I still want to confirm it.

(2) How to constraint this pins?

    Circuit diagram and .xdc file were shown as follow.

BR

lanxiang

circuit_diagram.PNG
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1 Reply
Moderator
Moderator
7,224 Views
Registered: ‎01-15-2008

Re: How to constraint BPI flash pin of FPGA when controlling BPI flash by user logic?

the flash interface multipurpose pins can be used as normal i/o's, since you want to read and write after configuration you will need to declare this pins in the xdc file with the required i/ostandard of the flash.

 

--Krishna

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