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fpga_newbee99
Visitor
Visitor
198 Views
Registered: ‎01-25-2021

How to use QSPI Flash on Kintex7

Hi everyone,

I designed an IP controller for QSPI Flash memory. I am going to implement my design into Kintex 7 which has a MT25QL128ABA8ESF-0SIT.

In my pin I/O constraint file, I assign my QSPI data (4 pins) and chip select following User Guide table of Kintex 7 as shown below.

But I can not assign my  spi_clk pin to FPGA_CCLK (B10 FPGA_CCLK). Vivado said that B10 is an invalid placement site!

Screenshot from 2021-04-12 17-09-16.png

Here is my assign pin file.

Screenshot from 2021-04-12 17-09-08.png

How can I assign that pin for my design? Does QSPI memory on Kintex 7 support my IP? 

Thanks!

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2 Replies
ddn
Moderator
Moderator
151 Views
Registered: ‎06-06-2018

@fpga_newbee99 ,

Vivado has prebuilt Flash Controller files. When you start programming your flash, it automatically gets into action and helps you in programming the flash.

CCLK is in Bank0 of FPGA, which is dedicated bank. User can't control this IO. And this IO has default LVCMOS IO standard.

Hope this helps you.

Regards,
Deepak D N
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necare81
Explorer
Explorer
117 Views
Registered: ‎03-31-2016

You need to use the STARTUP type primitive. For K7 I think it's actually STARTUPE2

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