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Visitor
Visitor
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Registered: ‎03-15-2018

Impact Programming and BitGen JTAG Disable

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If JTAG is disabled using the BitGen Disable_JTAG command, can Impact still be used to:

- Blow eFUSES in the FPGA?

- Program the FPGA?

 

Is it better to disable JTAG via the eFUSE control register and not through BitGen? 

 

Comments/Recommendations of disabling JTAG via the BitGen command versus the eFUSE in the Control register?

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-10-2008
What do you mean by 'disable JTAG via eFUSE'? To user eFUSE are some internal registers that can only be accessed by JTAG ports. You cannot use these registers to disable JTAG.
If you shut JTAG ports down by DISTABLE_JTAG, then you cannot access eFUSE or program FPGA through JTAG ports.

Thanks,
Ivy
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-10-2008
What do you mean by 'disable JTAG via eFUSE'? To user eFUSE are some internal registers that can only be accessed by JTAG ports. You cannot use these registers to disable JTAG.
If you shut JTAG ports down by DISTABLE_JTAG, then you cannot access eFUSE or program FPGA through JTAG ports.

Thanks,
Ivy
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Visitor
Visitor
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Registered: ‎03-15-2018

Thank you Ivy for the JTAG information!

 

I was mistaken, I thought the eFUSE Control Register (FUSE_CNTL, UG380) had a bit to disable JTAG.  After reviewing the register, I see that there isn't one.

 

Thank You,

Mike

 

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