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Newbie mstember
Newbie
6,716 Views
Registered: ‎03-01-2016

Kintex 7 CFGBVS effect on Vih and Vil of configuration pins

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The CFGBVS on my Kintex 7 FPGA is tied to VCCO of 3.3V.  

After reading many documents it isn't clear what the threshold voltages are for the Vih and Vil.

In particular, what is the Vih and Vil for the CCLK?

Is there any hysteresis on CCLK?

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1 Solution

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Scholar austin
Scholar
12,933 Views
Registered: ‎02-27-2008

Re: Kintex 7 CFGBVS effect on Vih and Vil of configuration pins

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m,

 

The dedicated IO are typically 8 to 12 mA LVCMOS.  There is no hysterysis.

 

The write_IBIS TCL command writes the IBIS models for your design.

 

LVCMOS Vil and Vih are typically between 1/3 and 2/3 of Vcco.

 

Proper signal integrity engineering is required for all pins, including and escpecially the dedicated ones used for configuration.  Most common mistake is to have a poor impedance match that causes reflections leading to clock glitches.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

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3 Replies
Scholar austin
Scholar
12,934 Views
Registered: ‎02-27-2008

Re: Kintex 7 CFGBVS effect on Vih and Vil of configuration pins

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m,

 

The dedicated IO are typically 8 to 12 mA LVCMOS.  There is no hysterysis.

 

The write_IBIS TCL command writes the IBIS models for your design.

 

LVCMOS Vil and Vih are typically between 1/3 and 2/3 of Vcco.

 

Proper signal integrity engineering is required for all pins, including and escpecially the dedicated ones used for configuration.  Most common mistake is to have a poor impedance match that causes reflections leading to clock glitches.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

Newbie mstember
Newbie
6,703 Views
Registered: ‎03-01-2016

Re: Kintex 7 CFGBVS effect on Vih and Vil of configuration pins

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Hi Austin,

 

Thanks for the incredibly fast response with the data I need.

 

Mike

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Scholar pratham
Scholar
6,662 Views
Registered: ‎06-05-2013

Re: Kintex 7 CFGBVS effect on Vih and Vil of configuration pins

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@mstember Glad to know you have got the information you are looking for. Information is availiable in UG470 #21

http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

 

-Pratham

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