10-09-2019 08:33 AM
I'm getting the above error message when trying to program an mcs file to the configuration flash memory attached to a Kintex Ultrascale FPGA on a custom board. I did use bitstream encryption for this project at one point, but I have now turned this off, and the FPGA in question does not have encryption keys programmed into its bbram or efuse memory. Why is Vivado requiring an encryption file when bitstream encryption is not enabled?
For the record, programming the FPGA with the (unencrypted) bitstream over JTAG works flawlessly, it's just when attempting mcs configuration that Vivado gives this error.
10-10-2019 12:41 AM
You mentioned you did use the encryption feature. What operations did you run? Did you use the efuse or bbram?
Try to read out the FUSE_CNTL register from JTAG if you can, see what it is.
10-10-2019 07:55 AM
I only used bbram, and I am also now using a new FPGA board that has not been configured with encrypted bitstreams at all. And, as I said, it's no problem downloading unencrypted bitstreams through JTAG, it's Vivado itself that is prohibiting me from even starting programming the configuration flash because it's unable to find an encryption file.
What I discovered today, though, is that this is most certainly a bug in Vivado, which I can circumvent, although the process to circumvent it is cumbersome and time-consuming:
This is a pretty annoying bug that should be relayed to the Vivado development team. They should be able to reproduce by using any kind of Vivado RTL project, and:
Not sure if all steps are needed to reproduce, but this is how it happens for me. Using Vivado 2018.2 and a Kintex Ultrascale KU115 FPGA on a custom board. The FPGA has 2x512 Mbit serial NOR flash attached to it in SPI x8 mode. The JTAG adapter is a Digilent HS3 dongle.