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Visitor
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Registered: ‎04-28-2017

MIPI D-PHY in ZCU102 board with ES2 device

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Hello,

I am trying to implement a Xilinx MIPI D-PHY design in a ZCU102 Rev 1.0 board.  I need the new MIPI line rate support (up to 2.5 Gbps) for this project, and I understand Vivado 2019.1+ is required.  However, my Vivado 2019.1.2 does not include the ZCU102 Rev 1.0 with the ES2 device in the board options.  Device options for the xczu9eg-FFVB1156 include only production devices.  And JTAG returns a device ID that indicates the ES2 part is what my board has.

Is it possible to program a bitfile to a ZCU102 ES2 part using Vivado 2019.1?  Is there any other way to implement a 2.5 Gbps Xilinx MIPI D-PHY in this device?

Thank you,

Erin

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Moderator
Moderator
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Registered: ‎06-05-2013
Yes, you can program the ZCU102 ES2 via 2019.1. Tool might give some error on bitstream version failure. You can use the parameter provided in the error and bypass the Es silicon check.

Harshit
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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Highlighted
Moderator
Moderator
353 Views
Registered: ‎06-05-2013
Yes, you can program the ZCU102 ES2 via 2019.1. Tool might give some error on bitstream version failure. You can use the parameter provided in the error and bypass the Es silicon check.

Harshit
-------------------------------------------------------------------------------------
For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

Highlighted
Visitor
Visitor
348 Views
Registered: ‎04-28-2017

Great, I will give this a try.

Thank you,

Erin