I have a design with an STM32H microcontroller interfaced to a Kintex-7. I had planned on having a QSPI interface between the two for a high-speed data link, but I recently figured out that the Xilinx QUADSPI core won't operate in slave mode (for QSPI). Since there didn't seem to be an off-the-shelf option for QSPI slaves, I started looking into the HyperBUS protocol (which had been my original plan anyway). Cypress supplies a HyperBUS controller, but only in master mode as well.
So I figured I would check to see if there was a core I was forgetting about before I start estimating the effort to design a QSPI or HyperBUS slave core by hand.