QSPI flash memory access when configuration is with EMCCLK

[psrivatsa]

Hi All,

I have a VCU9P (ES1 sample) board with micron dual quad flash memory. I have control to flash memory through QSPI controller v3.2 Xilinx IP and startupe3. I am using VIVADO 2017.2.

When the device configuration happens through EMCCLK, the flash device id read fails. Looks like the SCK_O (output from QSPI Controller) connected to USERCLKO (input of STARTUPE3) doesn't go through to the on board micron flash.

This setting is used for bitstream generation.

set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DIV-1 [current_design]

But, with internal Configuration clock CCLK to configure, the flash access works fine.

set_property BITSTREAM.CONFIG.CONFIGRATE 31.9 [current_design]

Is there any known issue with STARTUPE3, where EMCCLK is not switching to USERCLKO after end of startup? This happens even after the UG570 mentioned 3 clocks are given.

Regards,

Prashanth

[harshit]

Hi Prashanth

Do you access to Production silicon device. Can you test on that. I will look for VU9P ES1 errata to confirm this.

Thanks
Harshit

[psrivatsa]

Hi Harshit,

Well, we are yet to place an order for the production board. So, im with the ES1 device as of now.

Please keep me posted if you find anything.

Thanks,

Prashanth

[harshit · Accepted solution]

Hi Prashanth,

I found this statement in the errata for VU+ ES1 errata.

If EMCCLK is used for master mode configuration with an external CCLK, the STARTUPE3 inputs USRCCLKO and USRCCLKTS are not supported for driving the CCLK pin after configuration.

So once you have the production silicon you can test this. It should work as expected.

Thanks
Harshit

[psrivatsa]

Thanks Harshit, for digging out this info.