Questions about Select IO in ZYNQ

[JJbow]

The XC7Z100 has two non-differential pins in BANK10-BANK13 (e.g., IO_0_10 pin), and others are differential (e.g., IO_L1P_T0_10 and IO_L1N_T0_10). I found from the datasheet that the difference between them is that the latter can be handled as a differential pair. I want to confirm whether their functions are completely the same when used as a "general single-ended signal interface", thank you!

[miker · Accepted solution]

@JJbow 

You can reference the Zynq-7000 SoC Packaging and Pinout Product Specification (UG865; v1.8.1).  Table 1-5: Zynq-7000 SoC Pin Definitions provides the details of the pin naming conventions.  In general, you are correct that all of the single-ended IO interfaces are equivalent.  However, you can also view Figure 1-6: XC7Z100 or ZQ7Z100 Banks which highlights the XC7Z100 IO Banks.  You can see that IO Banks 9-13 are High Range (HR) IO Banks and IO Banks 33-35 are High Performance (HP) IO Banks so all the pins are not identical with respect to the IO Standards they can support.  You can reference the 7 Series FPGAs SelectIO Resources User Guide (UG471; v1.10) for details on the differences between HR and HP IO Banks.