[SOLVED]SPI Flash Prom program issue

[dactem]

Hi I want to program my Virtex XC5VLX30 with a flash Prom Spansion 25FL064P.

I use the platform cable USB II with impact 14.7 under Windows 7 32 bits.

the standalone FPGA program works.

When I try to Program the flash, it ends to 91% with an error:

""DONE did not go high, please check your configuration setup and mode settings""

the readback file show me what I consider an empty file exactly as the example in the topic below:

https://forums.xilinx.com/t5/Configuration/Error-Indirectly-Programming-M25P64-using-Virtex-5/td-p/533475

thanks for your help^.

[gurupra]

Hi @dactem

Can you please do some basic checks and share the details.

1. Connectivity of FPGA to Flash are as per guidelines

2. Reduce the JTAG clock frequency in Impact and recheck

3. Erase complete Flash and check its blank

4. Show the impact complete log

5. Snippet of readback data

6. If you still see issue, can you check on 64bit machine

[dactem]

Hi gurupa and thanks you for help,

1: can you precise ?

2: Before opening the thread, I reduced the clock frequency to the minimum without success.

3: already done, erase, blank check and readback are reported with success.

4: here attached the log in the console

Enumerating cables. Please wait.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
 Driver file xusb_xp2.sys found.
 Driver version: src=2301, dest=2301.
 Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
write (count, cmdBuffer, dataBuffer) failed C0000004.
Downloading C:/Xilinx/14.7/ISE_DS/ISE/data/xusb_xp2.hex.
Downloaded firmware version = 2401.
=======================================================
Found cable - > ESN = 0000153AC85201.
=======================================================
Connecting to cable (Usb Port - USB22).
Checking cable driver.
 Driver file xusb_xp2.sys found.
 Driver version: src=2301, dest=2301.
 Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
 Driver file xusb_xp2.sys found.
 Driver version: src=2301, dest=2301.
 Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
 Cable PID = 0008.
 Max current requested during enumeration is 300 mA.
Type = 0x0005.
 Cable Type = 3, Revision = 0.
 Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 2401.
File version of C:/Xilinx/14.7/ISE_DS/ISE/data/xusb_xp2.hex = 2401.
Firmware hex file version = 2401.
PLD file version = 200Dh.
 PLD version = 200Dh.
Type = 0x0005.
ESN option: 0000153AC85201.
'1': Loading file 'R:/Cao/Produit/D040/D040133/ProgTestSige/TestComplet/main.bit' ...
done.
INFO:iMPACT:1777 - 
Reading C:/Xilinx/14.7/ISE_DS/ISE/virtex5/data/xc5vlx30.bsd...
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
INFO:iMPACT:501 - '1': Added Device xc5vlx30 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Unprotect sectors: FALSE
'1': Loading file 'R:/Cao/Produit/D040/D040133/ProgTestSige/TestComplet/main.bit' ...
INFO:iMPACT - Elapsed time =      0 sec.
done.
INFO:iMPACT:501 - '1': Added Device xc5vlx30 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
'1': Added Device 8M successfully.
----------------------------------------------------------------------
Active mode is BS

------------------------  GUI: Wizard Data Report  ---------------------------
      Compression : false
      Fill Value : FF
      Output Format : mcs
      Swap Bits : false
      LoadDirection : UP
      PROM Basename : cedric
      File Location : R:\Cao\Produit\D040\D040133\ProgTestSige\TestComplet\/
      Auto Select : true
      Number of Revisions : 1
      Number of PROMs : 1
      PROM Name : 8M   PROM Size : 8388608 bits
        ------ Revision: 0 '0', 1 device(s) chain -----
        Device 0, pn=xc5vlx30   fn=main.bit
-------------------------- END of Report ----------------------------
INFO:iMPACT - Current time: 19/02/2018 08:41:43
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 33000000.
Validating chain...
Boundary-scan chain validated successfully.
1: Device Temperature: Current Reading: -273.00 C
1: VCCINT Supply: Current Reading:   0.000 V
1: VCCAUX Supply: Current Reading:   0.000 V
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
INFO:iMPACT - Downloading core file C:/Xilinx/14.7/ISE_DS/ISE/virtex5/data/xc5vlx30_spi.cor.
'1': Downloading core...
 Match_cycle = 0.
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1111 1001 1110 0000 1010 1000 0000 
INFO:iMPACT:2492 - '1': Completed downloading core to device.
'1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': Erasing Device.
'1': Using Sector Erase.
'1': Erasing non-volatile quad-enable bit...
S25FL064P Status Register Contents = 0x0000.
QUAD ENABLE                                       :         0
STATUS REGISTER PROTECT 1                         :         0
STATUS REGISTER PROTECT 0                         :         0
SECTOR PROTECT                                    :         0
TOP/BOTTOM PROTECT                                :         0
BLOCK PROTECT BIT 2                               :         0
BLOCK PROTECT BIT 1                               :         0
BLOCK PROTECT BIT 0                               :         0
PROGRESS_END - End Operation.
Elapsed time =     21 sec.
INFO:iMPACT - Current time: 19/02/2018 08:42:08
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 33000000.
Validating chain...
Boundary-scan chain validated successfully.
1: Device Temperature: Current Reading: -273.00 C
1: VCCINT Supply: Current Reading:   0.000 V
1: VCCAUX Supply: Current Reading:   0.000 V
'1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': Performing blank check on device...
'1': Part is blank.
PROGRESS_END - End Operation.
Elapsed time =     72 sec.
INFO:iMPACT - Current time: 19/02/2018 08:43:29
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 33000000.
Validating chain...
Boundary-scan chain validated successfully.
1: Device Temperature: Current Reading: -273.00 C
1: VCCINT Supply: Current Reading:   0.000 V
1: VCCAUX Supply: Current Reading:   0.000 V
'1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': IDCODE is '16' (in hex).
'1': ID Check passed.
 '1': Programming Flash.
'1': Reading device contents...
Failed at address, 0
'1': Verification Terminated
INFO:iMPACT - '1': Flash was not programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =     31 sec.

6: to be done.

[gurupra]

Hi @dactem

Thanks. 

1:  Sorry my bad. Please share the FPGA Flash schematic connectivity.

2,3 :  Understood.

4: I don't see your selection of the S25FL064 assuming that a portion of the log is missing.

   So the failure is at address 0, indicating that not a single byte of data is written to the Flash, but IDCODE and erase verification is passing.

Please skip the request 6. 

If possible can you try with ISE 14.1 too ?

[dactem]

This is a board already programmed and used here, so I'm confident with the FPGA and flash design.

the difference outside of the version of ISE is also the Flash size (originally 25MP16)

[gurupra]

Hi @dactem

Agreed, so can you go back to ISE version you used earlier (assuming it's 14.1 or earlier) and check if programming goes through for this new Flash of yours? 

We have seen some issues with ISE 14.2 and later for programming SPI devices especially on V5.

[dactem · Accepted solution]

I actually DL 14.1 and will keep you in touch regarding the results.

thank you.

[dactem]

It works !!

thank you, I spent 4 days to succeed just because of the version.

[tnareshnaresh7@gmail.com]

Hello..

Which Xilinx ise version you used for the spi flash?