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Registered: ‎03-03-2017

SVF to pattern generator signals

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Hi,

   I am looking to take an SVF file that I generated to program the FLASH firmware using an MCS/BIN file and I would like to create a pattern generator pattern that I can use to update the flash using the pattern generator in the field.

   My question is if anybody has ever successfully done this?    The SVF file is fairly extensive and I am not sure where delays might be needed etc.

   Another question is if anybody knows of any training options for learning how to convert an SVF file into usable signals that I can program into a pattern generator.

   Below is a copy of the comments portion of the SVF file so you can see what all the file is doing, and also I have put an image showing how the SVF file was setup.

 

2019-09-16 08_25_03-HS89_6x6 - [E__F_HS89_HS89_6x6_FlashProgramming_BRANCH_HS89_6x6.xpr] - Vivado 20.png

// config/idcode
// config/jprog
// Modify the below delay for config_init operation (0.100000 sec typical, 0.100000 sec maximum)
// config/jprog/poll
// config/slr
// config/start
// config/status
// config/idcode
// detect/spi/setclk
// spi/init1
// detect/spi/readid
// detect/spi/setclk
// spi/init1
// detect/spi/readid
// spi/reset
// spi/init1
// spi/select
// spi/write/enable
// spi/erase/run/sector
// Modify the below delay for sector erase operation (0.250000 sec typical, 1.000000 sec maximum)
...
// spi/write/enable
// spi/erase/run/sector
// Modify the below delay for sector erase operation (0.250000 sec typical, 1.000000 sec maximum)
// spi/write/enable
// spi/program/run
// Modify the below delay for program operation (0.000330 sec typical, 0.001200 sec maximum)
// spi/write/enable
...
// spi/program/run
// Modify the below delay for program operation (0.000330 sec typical, 0.001200 sec maximum)
// spi/write/enable
// spi/program/run
// Modify the below delay for program operation (0.000330 sec typical, 0.001200 sec maximum)
// Vivado Device xc7s50_0 mx25l6433f-spi-x1_x2_x4
// Vivado CfgMemOperation 0 EraseCheck ProgramCheck IOTerm=pull-none

Thanks.

Tim

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-10-2008

回复: SVF to pattern generator signals

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Check this: https://www.xilinx.com/support/documentation/application_notes/xapp058.pdf

Is it what you are looking for?

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-10-2008

回复: SVF to pattern generator signals

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I don't get the question, what kind of pattern generator you are planning to design?

If you were asking how to reduce the time that playing a SVF takes, the only thing you can 'reduce' is the Run-Test-IDLE time. Usually SVF gives extra long time to this step. You can reduce the RTI time by multiplying all of the them by a fraction: you need to test to find out for a specific device, how small this fraction can be.

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Registered: ‎03-03-2017

回复: SVF to pattern generator signals

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@iguo ,

   Sorry my question was a little confusing.

   The pattern generator I will be using is an ATE Digital Instrument where I generate pattern files to control the digital I/O pins.   I am looking to use the ATE to communicate on the JTAG bus in order to update firmware in the field.   So I am looking for any advice from anybody who may have done something like this.

Thanks.

Tim

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-10-2008

回复: SVF to pattern generator signals

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Check this: https://www.xilinx.com/support/documentation/application_notes/xapp058.pdf

Is it what you are looking for?

------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
---------------------------------------------------------------------------------------------------------

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Registered: ‎03-03-2017

回复: SVF to pattern generator signals

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@iguo ,

   Thanks for this link.   It appears this should get me what I need.   As long as I can generate an XSVF instead of SVF this document should help me convert that into usable patterns.

Thanks.

Tim

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Xilinx Employee
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Registered: ‎08-10-2008

回复: SVF to pattern generator signals

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It's not necessarily to generate XSVF. The code can play SVF as well. Just that XSVF has a even smaller size then SVF.

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