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Michael_G
Newbie
Newbie
370 Views
Registered: ‎07-20-2020

Spartan-6 with XCF04S - Master Serial Mode Configuration Problem

Hello,

I have a problem programming my FPGA (Spartan 6 - XC6SLX9 (CSG324)) with the PROM (XCF04S).

I can program the FPGA and everything works fine as expected. When I program the flash PROM, iMPACT says "Program Succeeded". After that the code stored in the FPGA is no longer available and is empty. When I turn the power off and on, the FPGA does not boot with the code from the PROM and is still empty. Can anyone help me with my problem?

I am using iMPACT 14.7.

Enclosed I have the schematics of the areas. Hopefully someone has a solution for me.

Best regards
Michael

XCF04S Problem 1.png
XCF04S Problem JTAG.png
XCF04S Problem 2.png
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2 Replies
iguo
Xilinx Employee
Xilinx Employee
360 Views
Registered: ‎08-10-2008

Any configuration failure issue, read out the status register is the first step. It tells many things.

It's expected that FPGA is 'empty' after you use impact to program flash.

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Michael_G
Newbie
Newbie
352 Views
Registered: ‎07-20-2020

Thank you for your answer. After I program the FPGA, I get the following status register contents (Read Device Status):
'1': Reading bootsts register contents...
[0] VALID_0 - ERROR OR END OF STARTUP (EOS) DETECTED : 1
[1] FALLBACK_0 - FALLBACK RECONFIGURATION ATTEMPT DETECTED : 0
[2] RESERVED : 0
[3] WTO_ERROR_0 - WATCHDOG TIME OUT ERROR : 0
[4] ID_ERROR_0 - FPGA DEVICE IDCODE ERROR : 0
[5] CRC_ERROR_0 - CYCLIC REDUNDANCY CHECK (CRC) ERROR : 0
[6] VALID_1 - ERROR OR END OF STARTUP (EOS) DETECTED : 0
[7] FALLBACK_1 - FALLBACK RECONFIGURATION ATTEMPT DETECTED : 0
[8] RESERVED : 0
[9] WTO_ERROR_1 - WATCHDOG TIME OUT ERROR : 0
[10] ID_ERROR_1 - FPGA DEVICE IDCODE ERROR : 0
[11] CRC_ERROR_1 - CYCLIC REDUNDANCY CHECK (CRC) ERROR : 0
[12] STRIKE CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[13] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[14] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[15] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
'1': Reading status register contents...
[0] CRC ERROR : 0
[1] IDCODE ERROR : 0
[2] DCM LOCK STATUS : 1
[3] GTS_CFG_B STATUS : 1
[4] GWE STATUS : 1
[5] GHIGH STATUS : 1
[6] DECRYPTION ERROR : 0
[7] DECRYPTOR ENABLE : 0
[8] HSWAPEN PIN : 1
[9] MODE PIN M[0] : 1
[10] MODE PIN M[1] : 1
[11] RESERVED : 0
[12] INIT_B PIN : 1
[13] DONE PIN : 1
[14] SUSPEND STATUS : 0
[15] FALLBACK STATUS : 0

After I program the PROM, I get the following status register contents (Read Device Status):
'1': Reading bootsts register contents...
[0] VALID_0 - ERROR OR END OF STARTUP (EOS) DETECTED : 0
[1] FALLBACK_0 - FALLBACK RECONFIGURATION ATTEMPT DETECTED : 0
[2] RESERVED : 0
[3] WTO_ERROR_0 - WATCHDOG TIME OUT ERROR : 0
[4] ID_ERROR_0 - FPGA DEVICE IDCODE ERROR : 0
[5] CRC_ERROR_0 - CYCLIC REDUNDANCY CHECK (CRC) ERROR : 0
[6] VALID_1 - ERROR OR END OF STARTUP (EOS) DETECTED : 0
[7] FALLBACK_1 - FALLBACK RECONFIGURATION ATTEMPT DETECTED : 0
[8] RESERVED : 0
[9] WTO_ERROR_1 - WATCHDOG TIME OUT ERROR : 0
[10] ID_ERROR_1 - FPGA DEVICE IDCODE ERROR : 0
[11] CRC_ERROR_1 - CYCLIC REDUNDANCY CHECK (CRC) ERROR : 0
[12] STRIKE CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[13] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[14] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
[15] STRIKE_CNT - STRIKE COUNT FOR FALLBACK ATTEMPTS : 0
'1': Reading status register contents...
[0] CRC ERROR : 0
[1] IDCODE ERROR : 0
[2] DCM LOCK STATUS : 1
[3] GTS_CFG_B STATUS : 0
[4] GWE STATUS : 0
[5] GHIGH STATUS : 0
[6] DECRYPTION ERROR : 0
[7] DECRYPTOR ENABLE : 0
[8] HSWAPEN PIN : 1
[9] MODE PIN M[0] : 1
[10] MODE PIN M[1] : 1
[11] RESERVED : 0
[12] INIT_B PIN : 1
[13] DONE PIN : 0
[14] SUSPEND STATUS : 0
[15] FALLBACK STATUS : 0

I wonder why both mode pins are '1'. I checked the board and the layout and it is fine and this should be '0' and '1'. Can you help me?

Best regards,
Michael

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