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Visitor
Visitor
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Registered: ‎03-27-2019

Spartan 7 XC7S15 Configuration Issue

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I am using XC7S15 for our application. The PROGRAM_B & INIT_B_0 & DONE_0 pin is pull-up to VCCO_0 with 4.7kOhm resistors.  But when power up, the FPGA cannot load the configuration from Flash automatically as below shown.  The DONE_0 signal is always low after power up.

 

Capture.PNG

 

I tried to give a High-Low-High on Program_B, the FPGA can load configuration from Flash automatically as below shown. 

Capture2.PNG

 

Why can FPGA not load the configuration from FLASH automatically when powering up?   Thanks! 

 

 

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Moderator
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Registered: ‎06-05-2013

Re: Spartan 7 XC7S15 Configuration Issue

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Also, make sure to disconnect the JTAG cable while booting up from flash. https://www.xilinx.com/support/answers/66954.html

-Harshit
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Registered: ‎01-22-2015

Re: Spartan 7 XC7S15 Configuration Issue

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@shawntang 

Some things to check…

  1. Did you successfully load a configuration file into the flash using Vivado?
  2. Check (again) that all FPGA-to-flash connections follow guidance in UG470(v1.13.1).  For example, if you are using “SPIx1 or SPIx2 Master Serial” mode then look at Figure 2-12 for the needed connections and pullup resistors.  Also ensure that M0, M1, M2 in Figure 2-12 are connected properly.
  3. Check the power pin on the flash device.  Is it receiving the correct voltage and is this voltage up and stable before the FPGA starts to communicate with the flash?
  4. Use your oscilloscope to check other signals used during configuration (see Figure 2-13 in UG470).  In particular, are you seeing the correct signals on CCLK, FCS_B, MOSI, and DIN?

Cheers,
Mark

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Registered: ‎06-05-2013

Re: Spartan 7 XC7S15 Configuration Issue

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Also, make sure to disconnect the JTAG cable while booting up from flash. https://www.xilinx.com/support/answers/66954.html

-Harshit
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Visitor
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Registered: ‎03-27-2019

Re: Spartan 7 XC7S15 Configuration Issue

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Hello Mark,

Thanks for your reply. All things you mentioned have been checked again.

Now the root cause is what @harshit mentioned: the JTAG connection will interrupt the FPGA configuration process, and result in FPGA configuration failure.

https://www.xilinx.com/support/answers/66954.html

Br,

Shawn

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Visitor
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Registered: ‎03-27-2019

Re: Spartan 7 XC7S15 Configuration Issue

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Hello Harshit,

Great thanks to you! That's the solutions!

Br,
Shawn