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Visitor
Visitor
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Registered: ‎03-13-2019

Stand alone flash programming failure

We have a customized Artix 7 board with a Cypress SPI flash to store the configuration image in the format of MCS file. The MCS file contains 2 images: rollback image at address 0x000000 and multiboot image at address 0x400000. We can sucessfully program the FPGA with the MCS file via JTAG, but if we use a stand alone flash programmer to program the flash with the same file, it didn't work. I know how Intel/Altera files work for stand alone flash programming tool but no idea on Xilinx FPGAs. After reading the MCS file format https://www.xilinx.com/support/answers/476.html, thought that it should work. Any advice would be greatly appreciated. Thanks.

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Moderator
Moderator
495 Views
Registered: ‎06-05-2013

You can follow XAPP1247 for using fallback/multiboot feature with Xilinx devices.
https://www.xilinx.com/support/documentation/application_notes/xapp1247-multiboot-spi.pdf
-Harshit
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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Visitor
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Registered: ‎03-13-2019

Hi Harshit, thanks for sharing the link. I don't have any issues with the fallback and multiboot image. The problem I am experiencing is how to program the image with a standalone flash programmer. I can successfully program the flash device with JTAG and a MCS file with combined image (Fallback at address 0 and multiboot at address 0x400000). I can also upgrade the multiboot image only via a USB cable and a test program. The current problem is that the board manufacutre wants to preprogram the flash chip with a standalone flash programmer with the combined MCS image, but the FPGA cannot boot. Need to solve this issue for board manufacture. 

We have successfully implemented three different flash programming appoaches (JTAG, USB, Standalone) for Altera FPGAs with remote update mode(similar to the Xilinx fallback and multiboot image feature) and no issues at all.  But for Altera FPGAs, the images for the three different programming appraoches are different (JIC file for JTAG, single image RBF file for USB and a different format combined image BIN file for stand alone flash programming), don't know if we need to generate a different type of image for the stand alone programming for the Xilinx FPGA. 

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Moderator
Moderator
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Registered: ‎06-05-2013

Can you try .bin file? You can generate .bin from Vivado HW manager.
Please share the design properties. Open the design .dcp and run the below command:-

report_property -all [current_design]

Are you using SPIX4? Run a testcase with SPIX1 design and see if it works when you use standalond flash programmer.

Refer to this thread: https://forums.xilinx.com/t5/FPGA-Configuration/Problem-programming-config-SPI-flash-without-Vivado-SDK-JTAG/td-p/930335

See if it this is the case issue you are facing.

-Harshit
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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Don’t forget to reply, kudo, and accept as solution.
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Visitor
Visitor
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Registered: ‎03-13-2019

Hi, thanks very much for your recommendation. We will try the .Bin file, based on UG470 pp.79 (https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf), looks like BIN file may have some luck. I tried the report_property -all [current_design] tcl command, but received the errors:

WARNING: [Vivado 12-628] No current design set.
ERROR: [Common 17-58] '' is not a valid first class Tcl object.

I can run the other report_property commands like

report_property -all [current_project]
report_property -all [current_fileset]
report_property -all [current_run]

We are using SPIX4, and the W and Hold pins are tied to Hi Z. 

Thanks

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Participant
Participant
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Registered: ‎05-16-2018

@fxiong ,

Program the SPI using JTAG, than read the SPI using your stand along flash programmer and compare to the data you are trying to program using your stand alone programmer.  I think .bin file is what you need though.  

A trick I use that might be helpful is to call a one line TCL script is tcl.post step of Write Bitstream.   

In that TCL script is a call to write_cfgmem.  This causes the MCS (or whatever format you wish) file to be generated without a separate step in the gui.   If you generate the file you need once manually in the GUI, copy the command from the TCL Console window.

Eric

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