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Registered: ‎03-20-2017

Ultrascale Encryption

I posted this problem earlier and received one response from someone claiming that they used my constraints in Vivado 18.2 and encryption worked.


Ok but I'm using 18.1.


So to restate my issue;


I have a design that I am attempting to encrypt with AES using the EFUSE key.


Here are the added constraints to encrypt;


set_property BITSTREAM.ENCRYPTION.ENCRYPT YES [current_design]
set_property BITSTREAM.ENCRYPTION.KEY0 256'h my key  [current_design]


When I rerun bitgen I get the following messages;


INFO: [Designutils 20-2558] AES-GCM based authentication is being used to provide data integrity for encrypted bitstreams.
Creating bitmap...
Creating bitstream...
Starting encryption...
INFO: [Bitstream 40-182] 1 key(s) are needed for encryption.
Bitstream compression saved 61676512 bits.
Starting encryption...
INFO: [Bitstream 40-182] 1 key(s) are needed for encryption.
Bitstream compression saved 27509312 bits.
Writing bitstream ./zmi5k_top.bit...
Writing bitstream ./zmi5k_top.bin...
INFO: [Vivado 12-1842] Bitgen Completed Successfully.
INFO: [Common 17-83] Releasing license: Implementation
141 Infos, 304 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_bitstream completed successfully
write_bitstream: Time (s): cpu = 00:13:24 ; elapsed = 00:09:07 . Memory (MB): peak = 10237.289 ; gain = 2751.375
INFO: [Common 17-206] Exiting Vivado at Thu Oct 4 09:27:20 2018...


This seems to indicate the tool is picking up on that I want the bitstream encrypted BUT it seems to not see the key I am specifying.  This seems to indicate why when I look in the implementation directory I don't see a *.nky file.  Note the *.bit file and a *.bin files are produced.


Has anyone else run into this issue?


I am resetting the design to write bitstream only BUT have tried completely re implementing the design as well with the same result.


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Xilinx Employee
Xilinx Employee
Registered: ‎06-21-2018

Have you tried specifying the Number of encryption blocks per key and Number of frames per AES-256 key?

It works for me when I specify those (Virtex Ultrascale, Vivado 2018.1):


set_property BITSTREAM.ENCRYPTION.KEYLIFE 32 [current_design]
set_property BITSTREAM.ENCRYPTION.RSAKEYLIFEFRAMES 32 [current_design]





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