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Registered: ‎09-12-2014

Ultrascale+ readback capture issue

Hi All,

 

I am trying to perform readback capture on VCU118 (XCVU9P).

I do that through ICAP by the use of embedded logic.

I am quite familiar with this process through Virtex5/6.

 

My observations on US+ are:

  1. issuing SHUTDOWN command - causes implementation to hang-out

what exactly do SHUTDOWN command (there is no way to get to know this from UG's) and is it necessary to perform readback capture ???

if I omitt SHUTDOWN command - performing reading from configuration memory doesn't hang the implementation

 

2. In the readback capture without issuing SHUTDOWN reading from particular address for seeking for a bit indicated in .ll file(Logic Location file) - frame address and offset, it seems to the bitstream doesn't correspond to registers values I know well and have possibility to change their states. I am preety sure that I am reading exactly bit of interest (use Chipscope)

I know there is different way in US+ to perform Capture CTL/MSK regs but it seems like it don't work.

 

are there any other factors (xdc attributes) that can influence mismatch between readback bitstream and Logic Location file ?

 

I know XAPP1230 and the way of performing readback via JTAG and reading whole configuration memory rather than particular frame.

Is ICAP in some kind of way defective for that purpose?

I keep MCAP disable.

Reading for example in that way IDCODE returns perfect value

 

please answear if someone is interested in this topic.

we can do further investigation .

 

thanks

Łukasz Matoga

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