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Registered: ‎01-08-2020

What are the differences between Xilinx Impact and Xilinx Vivado?

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Hi Xilinx Community,

Currently I'm using Xilinx Impact 14.7 to program my board that using Artix 7 FPGA. My board consist of following device:

Artix7 FPGA : XC7A100t-2FGG676I

Flash : 28F512P30E

Most of the board i have doesn't have any problem at all using Xilinx Impact, and the whole process to erase, blank check, program & verify, and verify checksum took around 10mins to complete.

The problem I have is that some of my board keep on stuck (hanging) at erase process and some of it stuck at program.

Then, I try to use the other Xilinx tool, which is Xilinx Vivado Lab 2019.2. I try to re-verify on all of my board that were passing and failed using Xilinx Impact, using same bit and mcs file.

And, to my surprise, all of the board passing the whole process and it took less than 3mins to complete.

Yet, i still couldnt figure out what are the reason behind why there is gap between Xilinx Impact and Xilinx Vivado.

Is there any technical explanation for this behaviour?

I didnt suspect the FPGA or Flash itself have a problem, and definitely not the board too.
It just seems like there are difference in communication between Impact/Vivado and FPGA & Flash.

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Registered: ‎02-09-2017

Hi hafiznaqiuddin.kamal@honeywell.com ,

Impact is part of the ISE tools, which is a Xilinx legacy tool last updated in 2013. the ISE is supposed to be used with Xilinx mature devices, such as 6-Series and older. It does still work with some 7-series devices (such as your Artix-7, but it's not really recommended).

The Vivado is the current development and programming tool, supporting all the devices from 7-Series and newer. An updated and improved version of Vivado is released many times a year and Xilinx will continue to do so for the foreseeable future.

So I'd say that the difference in programming time (and in programming issues) is due to Vivado being a much more stable and improved tool. 

If that's possible for you, I'd recommend that you switch to using Vivado.

Please let me know if you have any questions.

Thanks,

Andre Guerrero

Product Applications Engineer

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Registered: ‎02-09-2017

Hi hafiznaqiuddin.kamal@honeywell.com ,

Impact is part of the ISE tools, which is a Xilinx legacy tool last updated in 2013. the ISE is supposed to be used with Xilinx mature devices, such as 6-Series and older. It does still work with some 7-series devices (such as your Artix-7, but it's not really recommended).

The Vivado is the current development and programming tool, supporting all the devices from 7-Series and newer. An updated and improved version of Vivado is released many times a year and Xilinx will continue to do so for the foreseeable future.

So I'd say that the difference in programming time (and in programming issues) is due to Vivado being a much more stable and improved tool. 

If that's possible for you, I'd recommend that you switch to using Vivado.

Please let me know if you have any questions.

Thanks,

Andre Guerrero

Product Applications Engineer

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Registered: ‎01-08-2020

Hello Andre,

Thanks a lot for the brief explanation given. That would explain why all my board pass using Vivado, but not using Impact.

Vivado indeed much more easier to operate with and the TCL command for that also much more straight forward.

But i wonder why since 2014 I use Impact for this FPGA device, there were very less fallout until last year 2019, where most of it failed using Impact.

I'm pretty sure there are no design change on my board, and the only way to solve my issue of erase/program failure at that time is by rework/replace with new fresh FPGA. That was until I found that Vivado can solve my problem here, no more rework needed and that save me a lot of money.

Do you know why such thing happen? Or is there any latest improvement have been done on the FPGA itself that doesn't support by Impact anymore?

Thanks & Regards,

HAFIZ NAQIUDDIN

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