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wingedpower
Visitor
Visitor
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Registered: ‎10-10-2019

Where to download indirect spi flash programming COR files?

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Hello,

Looking for help with a known problem. I've searched the forums, the download archives, etc. and have not been able to find a means or location to find alternative *_spi.cor files that DO NOT perform a pull-up on all unused pins during the indirect spi flash programming.

This issue from another developer was addressed by Xilinx creating a custom COR file for their setup: https://forums.xilinx.com/t5/Spartan-Family-FPGAs-Archived/Spartan-6-pull-ups-during-SPI-indirect-programming-using/td-p/201743

"s6_spi_xc6slx45_io_pullnone.zip"

I'm running into issues using the Xilinx toolchain to program a board due to the vref voltage drop because ALL pins are going high when the COR+bitstream is being employed by IMPACT.

If possible, would like to see io_pullnone/io_float _spi.cor files for: spartan6lx9, spartan6lx15, spartan6lx25, spartan6lx100, spartan6lx150

If someone knows where a repo for these variants can be located and downloaded, I would greatly appreciate it. 

Wing,

 
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iguo
Xilinx Employee
Xilinx Employee
295 Views
Registered: ‎08-10-2008

These are very old files. I don't have them backed up and cannot find them at internal websites.
If you are famliliar with Xilinx file generation:

1. create two bits files, one with non used I/Os pullup and ther other with pullnone.
2. Compare the two files and find out the command to set this.
3. modify the .cor file you have.
4. Disable CRC checking of the .cor file.
See if this works.

------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
---------------------------------------------------------------------------------------------------------

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2 Replies
iguo
Xilinx Employee
Xilinx Employee
296 Views
Registered: ‎08-10-2008

These are very old files. I don't have them backed up and cannot find them at internal websites.
If you are famliliar with Xilinx file generation:

1. create two bits files, one with non used I/Os pullup and ther other with pullnone.
2. Compare the two files and find out the command to set this.
3. modify the .cor file you have.
4. Disable CRC checking of the .cor file.
See if this works.

------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
---------------------------------------------------------------------------------------------------------

View solution in original post

wingedpower
Visitor
Visitor
278 Views
Registered: ‎10-10-2019

Thanks for the quick reply. Had hoped that maybe Xilinx might have kept an archive of old processes. I’ll try the method you indicated to puzzle out the pullup/pulldown bits.

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