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Registered: ‎06-15-2020

XADC configuarion in artix7

Hello everyone, 

I am now designing a circuit using Artix7. In this i have two analog signal inputs for voltage monitoring. 

if i use XADC in artix, can i measure both analog inputs using VP and VN as single ended inputs. 

Also in this case , what about the states of Auxiliary Analog  input pins. i have no intention of using them as analog inputs. 

 while using the VP and VN pins of ADC, can I configure the Auxiliary (IO_LxxP_xx_AD15P_xx) IO's as digital signals. In my case i want to use them for LVDS signals. 

I have gone through XADC userguide datasheet. But it is't clear.

Can someone pls answer this for me.



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Registered: ‎01-22-2015



...can i measure both analog inputs using VP and VN as single ended inputs.
The VP/VN pin pair can be used for only a single analog input that is either unipolar or bipolar.  See figures 2-6 and 2-7 in Xilinx document UG480.

...can I configure the Auxiliary (IO_LxxP_xx_AD15P_xx) IO's as digital signals
Yes. Table 1-12 of Xilinx document UG475 shows that pins with designations "AD0P through AD15P"  and  "AD0N through AD15N" are multifunction pins.  This means they can be used as inputs to the XADC or as digital IO.

For example, consider the following designations for pins B3 and B2:

B3   IO_L10P_T1_AD15P_35        
B2   IO_L10N_T1_AD15N_35  

These two pins can be used for a single analog input to the XADC (ie. as AD15P/AD15N) or as the LVDS_25 pin pair (L10P/ L10N).

If you place an IOSTANDARD constraint on the pins (eg. set_property IOSTANDARD LVDS_25 [get_ports MY_AD15P] ) then the pins will be used for digital IO (in this case LVDS_25).   If you don't put a IOSTANDARD constraint on the pins then they will be used for XADC inputs.

In the Artix-7, you will need to use VCCO=2.5V for any bank of pins where you want LVDS_25 input and output.  See pages 91-93 of UG471 for more information on LVDS_25 in the Artix-7.


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