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niu_zun
Adventurer
Adventurer
299 Views
Registered: ‎12-19-2018

XCVU13P cannot boot from one spi flash.

Dear engineers:

I designed a board based on xcvu13p and I referred to VCU118, the eval kit of XCVU9P. I put a MT25QU01GBBB8ESF-0SIT flash on the board and I can successfully write this flash. However, the board cannot boot from the flash and the done pin cannot be pulled up. The M[2:0] pin is set to 001. could you please give me some help? 

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ddn
Xilinx Employee
Xilinx Employee
289 Views
Registered: ‎06-06-2018

@niu_zun ,

>> Please try removing your JTAG Cable from your custom board and then boot from flash and share the results ?

If issue still persists, share the configuration status registers as shown below : 

ConfigRegisterProperties.png

Regards,
Deepak D N
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niu_zun
Adventurer
Adventurer
227 Views
Registered: ‎12-19-2018

@ddn 

Hello, Thanks for your reply. 

We indeed boot from flash without the plug of jtag cable. However, the board still cannot boot from the flash.

The Done pin is still pulled down.

We wait for a minute and plug the jtag cable. We first try to choose "boot from configuration memory device" but this process failed, either. 

Then we export the information of the registers. The table is attached. 

I don't make sure the way to create mcs file and write the flash is right although the flash can be written successfully. We add two phrases in the xdc file: 

set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]

set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]

 and we choose the xt25qu01g-spi-x1_x2_x4 memory device. 

We desire your help. Best wishes.

boot from memory device failed.png
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niu_zun
Adventurer
Adventurer
227 Views
Registered: ‎12-19-2018

The register excel is here

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niu_zun
Adventurer
Adventurer
159 Views
Registered: ‎12-19-2018

@ddn hello dear engineer,Please give me some help..

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ddn
Xilinx Employee
Xilinx Employee
128 Views
Registered: ‎06-06-2018

@niu_zun ,

From the excel sheet you sent me, FPGA received data from flash. But DONE didnt went high.

So I suspect some Hardware issue. Please share your configuration interface schematic.

Regards,
Deepak D N
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niu_zun
Adventurer
Adventurer
60 Views
Registered: ‎12-19-2018

Hello, @ddn  Thanks for your reply.

Here are our constraining phrases and our schematic. 

 

set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
set_property CONFIG_MODE SPIx4 [current_design]

we once changed the cclk frequency but the device still cannot boot from the flash. We attached the CCLK signal. We also try to choose "boot from memory device " with the plug of the JTAG. This process cannot succeed, either. 

bank0.png
M[2-0].png
FLASH.png
CCLK.jpg
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