07-06-2019 08:13 PM - edited 07-06-2019 08:16 PM
We are in mass production phase of vision devices that used XC7Z020-clg484i-2. The device is boot from BOOT.bin on QSPI Flash 32MB. BOOT.bin only has FSBL.elf, Bitstream.bit, hello_world.elf. Not any OS.
During the QA process, we saw a very strange behavior of zynq:
Each time when the FPGA temperature (read XADC by JTAG on HW manager) on range of 70~80 C degree, zynq's suddenly reset, and it cannot load bitstream to FPGA after that. Somtime it detect ARM, sometime is not. We have double check boot switch, the boot mode register 0xF800025C, reset reset resion 0xF8000258, all OK.
We tried X-ray FPGA to make sure SMT without problem; trigger POR reset signal, monitor power VCC when heating only FPGA by IR lamp OR heating all the board. We cannot detect any unusual?
Futhermore, only 2 devices have this problem, each device has difference range!
Before that, we made15 prototypes that worked without any problems. I have attacted with this question screen-shots and logs (log.zip)
Do you guys have this similar problem before? Any ideas on how to fix or how to find the problem?
We are appreciate and Kudo for help
07-07-2019 07:01 AM
Have you looked at the power supplies?
Are all the power rails rising monotonic to their nominal vales?
How much power does your design dissipate? You may be close to the shutdown junction temperature imposed by the XADC/SYSMON (>135C) if its operating at 70 to 80 C.
07-08-2019 01:59 AM
I agree with Leo that this sounds like a power supply problem - but a problem that occurs with heat while FPGA is running and not during initial configuration.
I suggest you monitor all FPGA voltages with lab test equipment during your testing to see if any fall below absolute minimum values specified in datasheet for your device. You can also monitor FPGA voltages with XADC/sysmon, but using lab test equipment is better.
07-08-2019 06:26 AM
What temperature? Did it fail?
One other thought, are you holding off configuration with INIT_b, or trying to start a configuration by asserting PROG_b? Typically when you try to interfere with the built in power on reset, things may not work.
07-11-2019 03:50 AM
Update infor for today!
Today we reworked/reballed FPGA IC between "OK" and "Not OK" main board.
- For the pair of "Not OK" board panel and "OK" FPGA Zynq: we don't see the problem above!
- For the pair of "OK" board panel and "Not OK" FPGA Zynq: still have the same problem.
It seems that SMT made the problem, I attached 2 thermal profile at factory, do you guys have any suggestions?
May it be FPGA IC malfunctioned ?
08-29-2019 06:49 PM - edited 08-29-2019 06:50 PM
Updated on 25/8/2019:
We detected 3 boards more have the similar problem without any reasons. Xilinx please support to debug.
09-16-2020 11:03 PM - edited 09-16-2020 11:06 PM
Check your design for floating/undriven inputs on inputs that can effect a reset. Floating inputs have a nasty habit of changing binary value over temperature. What's a '1' at room temperature can become a '0' at a higher temperature, or vice-versa.
We once missed a pull resistor in a BOM. The board would get up to a specific temp and reset. Of course in reset it drew less power and would lower its temperature till, BAM, it came out of reset. The temperature at which this happened was fairly consistent for that device across many cycles.
Make sure that inputs to the chip (or upstream reset circuits) are not high-impedance and floating by accident. Make sure the parts you use have external pull resistors, or check you are using a version with strong enough internal pulls with good defaults. Note that a too-weak pull may also be sufficient at room temp when quiescent source or drain draw is lower and then become insufficient at higher temperature as leakage goes up.