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10,830 Views
Registered: ‎09-12-2014

breaking SelectMAP transmission

Hi all,

I am doing readback data on SelectMAP or ICAP in correct sequence (as stated in UG360 Table 7-2) :

write - > reading data -> write. And everything is ok.

Be specific : Virtex 6 needs dummy and 81 dwords per frame to be read.

 

My question is : Can i break transmission earler in reading phase on interface ? I am thinking of two scenarios :

1. read as many dwords as i need and try to initiate another transmission (without ending current transmission)

2. read as many dwords as i need , write ending sequence on interface and try to initiate another transmission.

 

I have done some research and what can be seen is that after first break transmission :

  x_forum_question1.jpg

 

second transmission can not be done due to ICAP_BUSY signal asserted :

 

x_forum_question2.jpg

 

I wonder if there is any command I can issue on interface to reset SelectMAP FSM or something like that.

 

Thanks for any advise !

Lukas

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1,997 Views
Registered: ‎09-12-2014

Hi All,

 

I am trying to perform readback capture on VCU118 (XCVU9P).

I do that through ICAP by the use of embedded logic.

I am quite familiar with this process through Virtex5/6.

 

My observations on US+ are:

  1. issuing SHUTDOWN command - causes implementation to hang-out

what exactly do SHUTDOWN command (there is no way to get to know this from UG's) and is it necessary to perform readback capture ???

if I omitt SHUTDOWN command - performing reading from configuration memory doesn't hang the implementation

 

2. In the readback capture without issuing SHUTDOWN reading from particular address for seeking for a bit indicated in .ll file(Logic Location file) - frame address and offset, it seems to the bitstream doesn't correspond to registers values I know well and have possibility to change their states. I am preety sure that I am reading exactly bit of interest (use Chipscope)

I know there is different way in US+ to perform Capture CTL/MSK regs but it seems like it don't work.

 

are there any other factors (xdc attributes) that can influence mismatch between readback bitstream and Logic Location file ?

 

I know XAPP1230 and the way of performing readback via JTAG and reading whole configuration memory rather than particular frame.

Is ICAP in some kind of way defective for that purpose?

I keep MCAP disable.

Reading for example in that way IDCODE returns perfect value

 

please answear if someone is interested in this topic.

we can do further investigation .

 

thanks

Łukasz Matoga

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