07-21-2020 01:55 AM
when i use hardware manager to generate a mcs file from one bitstream file , it can programme into flash successly.
but when i generate a mcs file from two bitstream files, it reports error after programming into flash.
i use vivado 2016.4, XC7V690T, 28FP30T flash(1024MB).
07-24-2020 06:52 PM
1. You can firstly check if you correctly create one mcs file with two bitstreams. Verify the command you used according to ug908.
2. Did it fail always at the same position? There is a possibility that this byte on flash may got broken. If you have another same board, have a cross test.
07-24-2020 07:33 PM
first， generated the MCS file correctly;
second,the same positon;
When I generated the MCS file to load into the FPGA, one of the console messages from vivado was that because I chose the x16 option,why all the addresses are multiplied by 2 ?
07-24-2020 07:53 PM
Copy the error message here please
07-24-2020 08:12 PM
07-24-2020 09:29 PM
Bus width defect function will handle width. It's not necessary to have different mcs format.